A 4 GHz 60 dB variable gain amplifier with tunable DC offset cancellation in 65 nm CMOS

A 4 GHz 60 dB variable gain amplifier with tunable DC offset cancellation in 65 nm CMOS

This letter presents a compact CMOS based variable gain amplifier with 60 dB gain control range and a feedback reconfigurable dc offset cancellation. The design is a four-stage fully differential cascaded amplifier implemented using a 65 nm CMOS process. The amplifier achieves a current controllable...

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Main Authors: Kumar, Thangarasu Bharatha, Ma, Kaixue, Yeo, Kiat Seng
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2015
Subjects:
DRNTU::Engineering::Electrical and electronic engineering::Antennas, wave guides, microwaves, radar, radio
Online Access:https://hdl.handle.net/10356/107104
http://hdl.handle.net/10220/25299
http://dx.doi.org/10.1109/LMWC.2014.2361676
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1071042019-12-06T22:24:47Z A 4 GHz 60 dB variable gain amplifier with tunable DC offset cancellation in 65 nm CMOS Kumar, Thangarasu Bharatha Ma, Kaixue Yeo, Kiat Seng School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Antennas, wave guides, microwaves, radar, radio This letter presents a compact CMOS based variable gain amplifier with 60 dB gain control range and a feedback reconfigurable dc offset cancellation. The design is a four-stage fully differential cascaded amplifier implemented using a 65 nm CMOS process. The amplifier achieves a current controllable gain range from -39.4 dB to +20.2 dB, a voltage tunable lower cutoff frequency from dc to 200 kHz, a consistent 3 dB bandwidth better than 4 GHz, a maximum dc power consumption of 26 mW, a measured in-band group delay variation of 20 ps, and a noise figure from 10 to 27 dB. The proposed VGA design occupies a compact die area of only 75 μm × 80 μm (excluding pads for measurement). Accepted version 2015-03-30T08:05:12Z 2019-12-06T22:24:47Z 2015-03-30T08:05:12Z 2019-12-06T22:24:47Z 2014 2014 Journal Article Kumar, T. B., Ma, K., & Yeo, K. S. (2015). A 4 GHz 60 dB variable gain amplifier with tunable DC offset cancellation in 65 nm CMOS. IEEE microwave and wireless components letters, 25(1), 37-39. https://hdl.handle.net/10356/107104 http://hdl.handle.net/10220/25299 http://dx.doi.org/10.1109/LMWC.2014.2361676 en IEEE microwave and wireless components letters © 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/LMWC.2014.2361676]. 3 p. application/pdf
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Antennas, wave guides, microwaves, radar, radio
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Antennas, wave guides, microwaves, radar, radio
Kumar, Thangarasu Bharatha
Ma, Kaixue
Yeo, Kiat Seng
A 4 GHz 60 dB variable gain amplifier with tunable DC offset cancellation in 65 nm CMOS
description This letter presents a compact CMOS based variable gain amplifier with 60 dB gain control range and a feedback reconfigurable dc offset cancellation. The design is a four-stage fully differential cascaded amplifier implemented using a 65 nm CMOS process. The amplifier achieves a current controllable gain range from -39.4 dB to +20.2 dB, a voltage tunable lower cutoff frequency from dc to 200 kHz, a consistent 3 dB bandwidth better than 4 GHz, a maximum dc power consumption of 26 mW, a measured in-band group delay variation of 20 ps, and a noise figure from 10 to 27 dB. The proposed VGA design occupies a compact die area of only 75 μm × 80 μm (excluding pads for measurement).
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Kumar, Thangarasu Bharatha
Ma, Kaixue
Yeo, Kiat Seng
format Article
author Kumar, Thangarasu Bharatha
Ma, Kaixue
Yeo, Kiat Seng
author_sort Kumar, Thangarasu Bharatha
title A 4 GHz 60 dB variable gain amplifier with tunable DC offset cancellation in 65 nm CMOS
title_short A 4 GHz 60 dB variable gain amplifier with tunable DC offset cancellation in 65 nm CMOS
title_full A 4 GHz 60 dB variable gain amplifier with tunable DC offset cancellation in 65 nm CMOS
title_fullStr A 4 GHz 60 dB variable gain amplifier with tunable DC offset cancellation in 65 nm CMOS
title_full_unstemmed A 4 GHz 60 dB variable gain amplifier with tunable DC offset cancellation in 65 nm CMOS
title_sort 4 ghz 60 db variable gain amplifier with tunable dc offset cancellation in 65 nm cmos
publishDate 2015
url https://hdl.handle.net/10356/107104
http://hdl.handle.net/10220/25299
http://dx.doi.org/10.1109/LMWC.2014.2361676
_version_ 1681039873258029056

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