Low voltage CMOS operational amplifier design towards maximum CMR
For the past few decades, there has been a ceaseless drive to reduce the minimum feature size of a MOS transistor. Reduced silicon area and, hence, lowered cost is a major motivational factor for such a trend. However, reducing transistor dimensions would also mean that the gate thickness is similar...
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| Format: | Theses and Dissertations |
| Language: | English |
| Published: |
2008
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| Online Access: | http://hdl.handle.net/10356/13198 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | For the past few decades, there has been a ceaseless drive to reduce the minimum feature size of a MOS transistor. Reduced silicon area and, hence, lowered cost is a major motivational factor for such a trend. However, reducing transistor dimensions would also mean that the gate thickness is similarly shrunk. If the supply voltage remains at 5V, the device would become unreliable. Also, electronic gadgets are becoming increasingly portable. These battery-operated devices must last sufficiently long for them to be viable as a product. All these point to a need to reduce the supply voltage of electronic circuits, in particular, the operational amplifier which is a well-known and widely used building block for analogue circuits. |
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