Development of submicron BiCMOS/CMOS digital cell library for low-voltage low-power applications

• Main Author: Lee, Heng Kah.
• Other Authors: Yeo, Kiat Seng
• Format: Theses and Dissertations
• Language: English
• Published: 2008
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• Online Access: http://hdl.handle.net/10356/13305
• Institution: Nanyang Technological University

In order to keep pace with the rapid scaling down of technology, the ASIC (Application specific integrated circuit) library has to be updated or redeveloped regularly. Redevelopment of library is essential when the library involves circuit techniques other than the static CMOS logic, where direct scaling down of devices may cause the circuit to malfunction. In this thesis, two new BiCMOS logic gates namely (a) a double capacitor full-swing BiCMOS circuit and (b) a NMOS positive feedback full-swing BiCMOS circuit, which can operate at a supply voltage below 1.5 V were introduced. The NMOS positive feedback full-swing BiCMOS circuit though has higher intrinsic propagation delay, in general, is better than the double capacitor full-swing BiCMOS design in terms of power and area. Furthermore, it can operate at wider range of supply voltages and process technologies. Hence, it is selected to be the core design for building all the BiCMOS cells in the library.