A crosstalk-immune sub-THz All-surface-wave I/O transceiver in 65-nm CMOS

A crosstalk-immune sub-THz All-surface-wave I/O transceiver in 65-nm CMOS

A surface-wave I/O transceiver is proposed and validated at 140 GHz in 65 nm CMOS. By generating, modulating and propagating surface plasmonic signal, the all-surface-wave I/O is prototyped with crosstalk-immune owning to the sub-wavelength localization of electromagnetic wave at the metal/dielectri...

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Main Authors: Liang, Yuan, Boon, Chirn Chye, Yu, Hao
Other Authors: School of Electrical and Electronic Engineering
Format: Conference or Workshop Item
Language:English
Published: 2020
Subjects:
Engineering::Electrical and electronic engineering
CMOS Oscillator
Terahertzes
Online Access:https://hdl.handle.net/10356/138358
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1383582020-05-04T04:43:17Z A crosstalk-immune sub-THz All-surface-wave I/O transceiver in 65-nm CMOS Liang, Yuan Boon, Chirn Chye Yu, Hao School of Electrical and Electronic Engineering 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Centre for Integrated Circuits and Systems Engineering::Electrical and electronic engineering CMOS Oscillator Terahertzes A surface-wave I/O transceiver is proposed and validated at 140 GHz in 65 nm CMOS. By generating, modulating and propagating surface plasmonic signal, the all-surface-wave I/O is prototyped with crosstalk-immune owning to the sub-wavelength localization of electromagnetic wave at the metal/dielectric interface. A four-way surface-wave signal source is power-combined via coupled oscillator network. A surface-wave modulator is realized by stacking two split-ring-resonator (SRR) unit-cells with opposite placement. It is further integrated into the all-surface-wave I/O with a surface-wave transmission line and matching converter. Measured results show that the proposed dual-channel I/O delivers a localized 140 GHz surface-wave signal, demonstrating crosstalk-immune on-chip transmission by supporting 13.5 Gb/s data-rate communication with 2.6 PJ/bit Power efficiency and a bit-error rate less than 10^(-12). MOE (Min. of Education, S’pore) Accepted version 2020-05-04T04:43:09Z 2020-05-04T04:43:09Z 2018 Conference Paper Liang, Y., Boon, C. C., & Yu, H. (2018). A crosstalk-immune sub-THz All-surface-wave I/O transceiver in 65-nm CMOS. Proceedings of the 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 352-355. doi:10.1109/RFIC.2018.8429002 https://hdl.handle.net/10356/138358 10.1109/RFIC.2018.8429002 352 355 en MOE RG86/16 © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/RFIC.2018.8429002 application/pdf
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic Engineering::Electrical and electronic engineering
CMOS Oscillator
Terahertzes
spellingShingle Engineering::Electrical and electronic engineering
CMOS Oscillator
Terahertzes
Liang, Yuan
Boon, Chirn Chye
Yu, Hao
A crosstalk-immune sub-THz All-surface-wave I/O transceiver in 65-nm CMOS
description A surface-wave I/O transceiver is proposed and validated at 140 GHz in 65 nm CMOS. By generating, modulating and propagating surface plasmonic signal, the all-surface-wave I/O is prototyped with crosstalk-immune owning to the sub-wavelength localization of electromagnetic wave at the metal/dielectric interface. A four-way surface-wave signal source is power-combined via coupled oscillator network. A surface-wave modulator is realized by stacking two split-ring-resonator (SRR) unit-cells with opposite placement. It is further integrated into the all-surface-wave I/O with a surface-wave transmission line and matching converter. Measured results show that the proposed dual-channel I/O delivers a localized 140 GHz surface-wave signal, demonstrating crosstalk-immune on-chip transmission by supporting 13.5 Gb/s data-rate communication with 2.6 PJ/bit Power efficiency and a bit-error rate less than 10^(-12).
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Liang, Yuan
Boon, Chirn Chye
Yu, Hao
format Conference or Workshop Item
author Liang, Yuan
Boon, Chirn Chye
Yu, Hao
author_sort Liang, Yuan
title A crosstalk-immune sub-THz All-surface-wave I/O transceiver in 65-nm CMOS
title_short A crosstalk-immune sub-THz All-surface-wave I/O transceiver in 65-nm CMOS
title_full A crosstalk-immune sub-THz All-surface-wave I/O transceiver in 65-nm CMOS
title_fullStr A crosstalk-immune sub-THz All-surface-wave I/O transceiver in 65-nm CMOS
title_full_unstemmed A crosstalk-immune sub-THz All-surface-wave I/O transceiver in 65-nm CMOS
title_sort crosstalk-immune sub-thz all-surface-wave i/o transceiver in 65-nm cmos
publishDate 2020
url https://hdl.handle.net/10356/138358
_version_ 1681059533932199936

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