RF performance of a highly linear power amplifier EDNMOS transistor on trap-rich SOI

Results specific to power amplifiers (PAs) designed using a SOI EDNMOS transistor free of kinks in ID-VD plane and high breakdown voltage are presented. The suppression of the drain current kink and improvement in breakdown voltage are achieved by the omission of the N+ source implant step. Instead,...

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Main Authors: Toh, Rui Tze, Ang, Diing Shenp, Parthasarathy, Shyam, Wong, Jen Shuang, Yap, Hin Kiong, Zhang, Shaoqiang
其他作者: School of Electrical and Electronic Engineering
格式: Article
語言:English
出版: 2020
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在線閱讀:https://hdl.handle.net/10356/141467
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機構: Nanyang Technological University
語言: English