Oxide thin-film transistor-based vertically stacked complementary inverter for logic and photo-sensor operations

Numerous studies have addressed the utilization of oxide thin-film transistor (TFT)-based complementary logic circuits that are based on two-dimensional (2D) planar structures. However, there are fundamental limits to the 2D planar structured complementary logic circuits, such as a large dimension a...

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Main Authors: Joo, Hyo-Jun, Shin, Min-Gyu, Jung, Hwan-Seok, Cha, Hyun-Seok, Nam, Donguk, Kwon, Hyuck-In
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2020
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Online Access:https://hdl.handle.net/10356/142236
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1422362020-06-17T08:52:17Z Oxide thin-film transistor-based vertically stacked complementary inverter for logic and photo-sensor operations Joo, Hyo-Jun Shin, Min-Gyu Jung, Hwan-Seok Cha, Hyun-Seok Nam, Donguk Kwon, Hyuck-In School of Electrical and Electronic Engineering Engineering::Electrical and electronic engineering Oxide TFT Vertically Stacked Complementary Logic Inverter Numerous studies have addressed the utilization of oxide thin-film transistor (TFT)-based complementary logic circuits that are based on two-dimensional (2D) planar structures. However, there are fundamental limits to the 2D planar structured complementary logic circuits, such as a large dimension and a large parasitic resistance. This work demonstrated a vertically stacked three-dimensional complementary inverter composed of a p-channel tin monoxide (SnO) TFT and an n-channel indium-gallium-zinc oxide (IGZO) TFT. A bottom-gate p-channel SnO TFT was formed on the top-gate n-channel IGZO TFT with a shared common gate electrode. The fabricated vertically stacked complementary inverter exhibited full swing characteristics with a voltage gain of ~33.6, a high noise margin of 3.13 V, and a low noise margin of 3.16 V at a supplied voltage of 10 V. The achieved voltage gain of the fabricated complementary inverter was higher than that of the vertically stacked complementary inverters composed of other oxide TFTs in previous works. In addition, we showed that the vertically stacked complementary inverter exhibited excellent visible-light photoresponse. This indicates that the oxide TFT-based vertically stacked complementary inverter can be used as a sensitive photo-sensor operating in the visible spectral range with the voltage read-out scheme. 2020-06-17T08:52:17Z 2020-06-17T08:52:17Z 2019 Journal Article Joo, H.-J., Shin, M.-G., Jung, H.-S., Cha, H.-S., Nam, D. & Kwon., H.-I. (2019). Oxide thin-film transistor-based vertically stacked complementary inverter for logic and photo-sensor operations. Materials, 12(23), 3815-. doi:10.3390/ma12233815 1996-1944 https://hdl.handle.net/10356/142236 10.3390/ma12233815 31757045 23 12 en Materials © 2019 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/). application/pdf
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic Engineering::Electrical and electronic engineering
Oxide TFT
Vertically Stacked Complementary Logic Inverter
spellingShingle Engineering::Electrical and electronic engineering
Oxide TFT
Vertically Stacked Complementary Logic Inverter
Joo, Hyo-Jun
Shin, Min-Gyu
Jung, Hwan-Seok
Cha, Hyun-Seok
Nam, Donguk
Kwon, Hyuck-In
Oxide thin-film transistor-based vertically stacked complementary inverter for logic and photo-sensor operations
description Numerous studies have addressed the utilization of oxide thin-film transistor (TFT)-based complementary logic circuits that are based on two-dimensional (2D) planar structures. However, there are fundamental limits to the 2D planar structured complementary logic circuits, such as a large dimension and a large parasitic resistance. This work demonstrated a vertically stacked three-dimensional complementary inverter composed of a p-channel tin monoxide (SnO) TFT and an n-channel indium-gallium-zinc oxide (IGZO) TFT. A bottom-gate p-channel SnO TFT was formed on the top-gate n-channel IGZO TFT with a shared common gate electrode. The fabricated vertically stacked complementary inverter exhibited full swing characteristics with a voltage gain of ~33.6, a high noise margin of 3.13 V, and a low noise margin of 3.16 V at a supplied voltage of 10 V. The achieved voltage gain of the fabricated complementary inverter was higher than that of the vertically stacked complementary inverters composed of other oxide TFTs in previous works. In addition, we showed that the vertically stacked complementary inverter exhibited excellent visible-light photoresponse. This indicates that the oxide TFT-based vertically stacked complementary inverter can be used as a sensitive photo-sensor operating in the visible spectral range with the voltage read-out scheme.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Joo, Hyo-Jun
Shin, Min-Gyu
Jung, Hwan-Seok
Cha, Hyun-Seok
Nam, Donguk
Kwon, Hyuck-In
format Article
author Joo, Hyo-Jun
Shin, Min-Gyu
Jung, Hwan-Seok
Cha, Hyun-Seok
Nam, Donguk
Kwon, Hyuck-In
author_sort Joo, Hyo-Jun
title Oxide thin-film transistor-based vertically stacked complementary inverter for logic and photo-sensor operations
title_short Oxide thin-film transistor-based vertically stacked complementary inverter for logic and photo-sensor operations
title_full Oxide thin-film transistor-based vertically stacked complementary inverter for logic and photo-sensor operations
title_fullStr Oxide thin-film transistor-based vertically stacked complementary inverter for logic and photo-sensor operations
title_full_unstemmed Oxide thin-film transistor-based vertically stacked complementary inverter for logic and photo-sensor operations
title_sort oxide thin-film transistor-based vertically stacked complementary inverter for logic and photo-sensor operations
publishDate 2020
url https://hdl.handle.net/10356/142236
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