Neural network accelerator design using computing in memory
Image Processing has become an extremely popular field of application for Neural Networks. Convolution is a basic and critical operation for pattern recognition and breaking down images into feature maps. Similarly, “Deconvolution” is a critical step for constructing new data points out of given inp...
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| Format: | Final Year Project |
| Language: | English |
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Nanyang Technological University
2021
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| Online Access: | https://hdl.handle.net/10356/148415 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | Image Processing has become an extremely popular field of application for Neural Networks. Convolution is a basic and critical operation for pattern recognition and breaking down images into feature maps. Similarly, “Deconvolution” is a critical step for constructing new data points out of given inputs for tasks such as image recovery in generative adversarial networks. With new emerging technology, Resistive Random-Access-Memory (ReRAM) based architectures have been widely tested and delivers good performance in accelerating the convolution operation through a process of “Computing-in-Memory”. The “Deconvolution” operation, however, still suffers from high overheads due to significant redundancies (>80%) involving zero-multiplications and/or incompatibility with the existing ReRAM based accelerator designs. In this project, we will explore various state-of-the-art Computing-in-Memory accelerator designs that have been proposed and focus our efforts on evaluating and implementing a design for a “Deconvolution” accelerator called RED. |
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