Design, fabrication, and modelling of 2D material-based electronic devices

Due to advancements in the processes nodes of semiconductor device fabrication, which result in the continuous downscaling of transistors, short channel effects have become an inevitable problem to be overcome as transistors continue to get smaller. One of the ways to mitigate short channel effects...

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Bibliographic Details
Main Author: Lim, Ryan Christopher Ming Fu
Other Authors: Tay Beng Kang
Format: Final Year Project
Language:English
Published: Nanyang Technological University 2021
Subjects:
Online Access:https://hdl.handle.net/10356/149979
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Institution: Nanyang Technological University
Language: English
Description
Summary:Due to advancements in the processes nodes of semiconductor device fabrication, which result in the continuous downscaling of transistors, short channel effects have become an inevitable problem to be overcome as transistors continue to get smaller. One of the ways to mitigate short channel effects are through the use of 2D materials, which allow for better electrostatic control of the transistor channel. This work done over the course of this project will be split into two parts, experimental and simulation work. The experimental work will cover the preparation of 2D material samples via mechanical exfoliation method, after which the fabrication processes of spin coating, electron beam lithography, develop, metal deposition, lift off to fabricate a field effect transistor. After the fabrication processes, device characterisation will be carried out to determine the transfer and output characteristics of the device. The simulation work involves the establishment and validation of a black phosphorus model with current experimental data, the simulation of 2D materials-based field effect transistors using HSPICE, to obtain their transfer and output characteristics. After obtaining the 2D materials-based field effect transistors’ transfer and output characteristics, inverter, NAND and NOR gate level circuits will be built and simulated to demonstrate their potential usage in logic circuits application in the future.