Design and synthesis of improved reversible circuits using AIG- and MIG-based graph data structures

• Main Authors: Bandyopadhyay, Chandan, Das, Rakesh, Chattopadhyay, Anupam, Rahaman, Hafizur
• Other Authors: School of Computer Science and Engineering
• Format: Article
• Language: English
• Published: 2021
• Subjects: Engineering::Computer science and engineering; Data Structures; Graph Theory
• Online Access: https://hdl.handle.net/10356/151938
• Institution: Nanyang Technological University

Reversible logic synthesis is one of the best suited ways which act as the intermediate step for synthesising Boolean functions on quantum technologies. For a given Boolean function, there are multiple possible intermediate representations (IRs), based on functional abstraction, e.g. truth table, decision diagrams or circuit abstraction, e.g. binary decision diagram (BDD), and-inverter graph (AIG) and majority inverter graph (MIG). These IRs play an important role in building circuits as the choice of an IR directly impacts on cost parameters of the design. In the authors' work, they are analysing the effects of different graphbased IRs (BDD, AIG and MIG) and their usability in making efficient circuit realisations. Although applications of BDDs as an IR to represent large functions has already been studied, here they are demonstrating a synthesis scheme by taking AIG and MIG as IRs and making a comprehensive comparative analysis over all these three graph-based IRs. In experimental evaluation, it is being observed that for small functions BDD gives more compact circuits than the other two IRs but when the input size increases, then MIG as IR makes substantial improvements in cost parameters as compared with BDD by reducing quantum cost by 39% on an average. Along with the experimental results, a detailed analysis over the different IRs is also included to find their easiness in designing circuits.