An energy-efficient convolution unit for depthwise separable convolutional neural networks

High performance but computationally expensive Convolutional Neural Networks (CNNs) require both algorithmic and custom hardware improvement to reduce model size and to improve energy efficiency for edge computing applications. Recent CNN architectures employ depthwise separable convolution to reduc...

Full description

Saved in:
Bibliographic Details
Main Authors: Chong, Yi Sheng, Goh, Wang Ling, Ong, Yew-Soon, Nambiar, Vishnu P., Do, Anh Tuan
Other Authors: Interdisciplinary Graduate School (IGS)
Format: Conference or Workshop Item
Language:English
Published: 2021
Subjects:
Online Access:https://hdl.handle.net/10356/152096
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-152096
record_format dspace
spelling sg-ntu-dr.10356-1520962023-03-05T16:27:25Z An energy-efficient convolution unit for depthwise separable convolutional neural networks Chong, Yi Sheng Goh, Wang Ling Ong, Yew-Soon Nambiar, Vishnu P. Do, Anh Tuan Interdisciplinary Graduate School (IGS) School of Electrical and Electronic Engineering School of Computer Science and Engineering 2021 IEEE International Symposium on Circuits and Systems (ISCAS) Institute of Microeletronics, A*STAR Energy Research Institute @ NTU (ERI@N) Engineering::Electrical and electronic engineering Convolutional Neural Network CNN Accelerator High performance but computationally expensive Convolutional Neural Networks (CNNs) require both algorithmic and custom hardware improvement to reduce model size and to improve energy efficiency for edge computing applications. Recent CNN architectures employ depthwise separable convolution to reduce the total number of weights and MAC operations. However, depthwise separable convolution workload does not run efficiently in existing CNN accelerators. This paper proposes an energy-efficient CONV unit for pointwise and depthwise operation. The CONV unit utilizes weight stationary to enable high efficiency. The row partial sum reduction is engaged to increase parallelism in pointwise convolution thereby lightening the memory requirements on output partial sums. Our design achieves a maximum efficiency of 3.17 TOPS/W at 0.85V/40nm CMOS which is well-suited for energy constrained edge computing applications. Accepted version 2021-07-15T06:00:18Z 2021-07-15T06:00:18Z 2021 Conference Paper Chong, Y. S., Goh, W. L., Ong, Y., Nambiar, V. P. & Do, A. T. (2021). An energy-efficient convolution unit for depthwise separable convolutional neural networks. 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021-May, 1-5. https://dx.doi.org/10.1109/ISCAS51556.2021.9401192 9781728192017 https://hdl.handle.net/10356/152096 10.1109/ISCAS51556.2021.9401192 2-s2.0-85109042576 2021-May 1 5 en © 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/ISCAS51556.2021.9401192 application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering::Electrical and electronic engineering
Convolutional Neural Network
CNN Accelerator
spellingShingle Engineering::Electrical and electronic engineering
Convolutional Neural Network
CNN Accelerator
Chong, Yi Sheng
Goh, Wang Ling
Ong, Yew-Soon
Nambiar, Vishnu P.
Do, Anh Tuan
An energy-efficient convolution unit for depthwise separable convolutional neural networks
description High performance but computationally expensive Convolutional Neural Networks (CNNs) require both algorithmic and custom hardware improvement to reduce model size and to improve energy efficiency for edge computing applications. Recent CNN architectures employ depthwise separable convolution to reduce the total number of weights and MAC operations. However, depthwise separable convolution workload does not run efficiently in existing CNN accelerators. This paper proposes an energy-efficient CONV unit for pointwise and depthwise operation. The CONV unit utilizes weight stationary to enable high efficiency. The row partial sum reduction is engaged to increase parallelism in pointwise convolution thereby lightening the memory requirements on output partial sums. Our design achieves a maximum efficiency of 3.17 TOPS/W at 0.85V/40nm CMOS which is well-suited for energy constrained edge computing applications.
author2 Interdisciplinary Graduate School (IGS)
author_facet Interdisciplinary Graduate School (IGS)
Chong, Yi Sheng
Goh, Wang Ling
Ong, Yew-Soon
Nambiar, Vishnu P.
Do, Anh Tuan
format Conference or Workshop Item
author Chong, Yi Sheng
Goh, Wang Ling
Ong, Yew-Soon
Nambiar, Vishnu P.
Do, Anh Tuan
author_sort Chong, Yi Sheng
title An energy-efficient convolution unit for depthwise separable convolutional neural networks
title_short An energy-efficient convolution unit for depthwise separable convolutional neural networks
title_full An energy-efficient convolution unit for depthwise separable convolutional neural networks
title_fullStr An energy-efficient convolution unit for depthwise separable convolutional neural networks
title_full_unstemmed An energy-efficient convolution unit for depthwise separable convolutional neural networks
title_sort energy-efficient convolution unit for depthwise separable convolutional neural networks
publishDate 2021
url https://hdl.handle.net/10356/152096
_version_ 1759858368000819200