A CMOS PSR enhancer with 87.3 mV PVT-insensitive dropout voltage for sensor circuits
A new power supply rejection (PSR) based enhancer with small and stable dropout voltage is presented in this work. It is implemented using TSMC-40 nm process technology and powered by 1.2 V supply voltage. A number of circuit techniques are proposed in this work. These include the temperature compen...
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sg-ntu-dr.10356-1539222022-06-03T05:48:25Z A CMOS PSR enhancer with 87.3 mV PVT-insensitive dropout voltage for sensor circuits Zhang, Jianyu Chan, Pak Kwong School of Electrical and Electronic Engineering Engineering::Electrical and electronic engineering Power Supply Rejection Enhancer Dropout Voltage A new power supply rejection (PSR) based enhancer with small and stable dropout voltage is presented in this work. It is implemented using TSMC-40 nm process technology and powered by 1.2 V supply voltage. A number of circuit techniques are proposed in this work. These include the temperature compensation for Level-Shifted Flipped Voltage Follower (LSFVF) and the Complementary-To-Absolute Temperature (CTAT) current reference. The typical output voltage and dropout voltage of the enhancer is 1.1127 V and 87.3 mV, respectively. The Monte-Carlo simulation of this output voltage yields a mean T.C. of 29.4 ppm/◦ C from −20◦ C and 80◦ C. Besides, the dropout voltage has been verified with good immunity against Process, Temperature and Process (PVT) variation through the worst-case simulation. Consuming only 4.75 µA, the circuit can drive load up to 500 µA to yield additional PSR improvement of 36 dB and 20 dB of PSR at 1 Hz and 1 MHz, respectively for the sensor circuit of interest. This is demonstrated through the application of an enhancer on the instrumentation Differential Difference Amplifier (DDA) for sensing floating bridge sensor signal. The comparative Monte-Carlo simulation results on a respective DDA circuit have revealed that the process sensitivity of output voltage of this work has achieved 14 times reduction in transient metrics with respect to that of the conventional counterpart over the operation temperature range in typical operation condition. Due to simplicity without voltage reference and operational amplifier(s), low power and small consumption of supply voltage headroom, the proposed work is very useful for supply noise sensitive analog or sensor circuit applications. Published version 2022-06-03T05:47:23Z 2022-06-03T05:47:23Z 2021 Journal Article Zhang, J. & Chan, P. K. (2021). A CMOS PSR enhancer with 87.3 mV PVT-insensitive dropout voltage for sensor circuits. Sensors, 21(23), 7856-. https://dx.doi.org/10.3390/s21237856 1424-8220 https://hdl.handle.net/10356/153922 10.3390/s21237856 2-s2.0-85119685658 23 21 7856 en Sensors © 2021 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/). application/pdf |
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Engineering::Electrical and electronic engineering Power Supply Rejection Enhancer Dropout Voltage Zhang, Jianyu Chan, Pak Kwong A CMOS PSR enhancer with 87.3 mV PVT-insensitive dropout voltage for sensor circuits |
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A new power supply rejection (PSR) based enhancer with small and stable dropout voltage is presented in this work. It is implemented using TSMC-40 nm process technology and powered by 1.2 V supply voltage. A number of circuit techniques are proposed in this work. These include the temperature compensation for Level-Shifted Flipped Voltage Follower (LSFVF) and the Complementary-To-Absolute Temperature (CTAT) current reference. The typical output voltage and dropout voltage of the enhancer is 1.1127 V and 87.3 mV, respectively. The Monte-Carlo simulation of this output voltage yields a mean T.C. of 29.4 ppm/◦ C from −20◦ C and 80◦ C. Besides, the dropout voltage has been verified with good immunity against Process, Temperature and Process (PVT) variation through the worst-case simulation. Consuming only 4.75 µA, the circuit can drive load up to 500 µA to yield additional PSR improvement of 36 dB and 20 dB of PSR at 1 Hz and 1 MHz, respectively for the sensor circuit of interest. This is demonstrated through the application of an enhancer on the instrumentation Differential Difference Amplifier (DDA) for sensing floating bridge sensor signal. The comparative Monte-Carlo simulation results on a respective DDA circuit have revealed that the process sensitivity of output voltage of this work has achieved 14 times reduction in transient metrics with respect to that of the conventional counterpart over the operation temperature range in typical operation condition. Due to simplicity without voltage reference and operational amplifier(s), low power and small consumption of supply voltage headroom, the proposed work is very useful for supply noise sensitive analog or sensor circuit applications. |
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School of Electrical and Electronic Engineering |
author_facet |
School of Electrical and Electronic Engineering Zhang, Jianyu Chan, Pak Kwong |
format |
Article |
author |
Zhang, Jianyu Chan, Pak Kwong |
author_sort |
Zhang, Jianyu |
title |
A CMOS PSR enhancer with 87.3 mV PVT-insensitive dropout voltage for sensor circuits |
title_short |
A CMOS PSR enhancer with 87.3 mV PVT-insensitive dropout voltage for sensor circuits |
title_full |
A CMOS PSR enhancer with 87.3 mV PVT-insensitive dropout voltage for sensor circuits |
title_fullStr |
A CMOS PSR enhancer with 87.3 mV PVT-insensitive dropout voltage for sensor circuits |
title_full_unstemmed |
A CMOS PSR enhancer with 87.3 mV PVT-insensitive dropout voltage for sensor circuits |
title_sort |
cmos psr enhancer with 87.3 mv pvt-insensitive dropout voltage for sensor circuits |
publishDate |
2022 |
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https://hdl.handle.net/10356/153922 |
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1735491176916582400 |