Design of a power supply rejection enhancer for analog circuits dedicated to mixed-signal environment

A new power supply rejection (PSR) based enhancer with small and stable dropout voltage is presented in this work. It is implemented using TSMC-40nm process technology and powered by 1.2V supply voltage. A number of circuit techniques are proposed in this work. These include the temperature compensa...

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Main Author: Zhang, Jianyu
Other Authors: Chan Pak Kwong
Format: Thesis-Master by Coursework
Language:English
Published: Nanyang Technological University 2021
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Online Access:https://hdl.handle.net/10356/154245
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Institution: Nanyang Technological University
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spelling sg-ntu-dr.10356-1542452023-07-04T15:17:21Z Design of a power supply rejection enhancer for analog circuits dedicated to mixed-signal environment Zhang, Jianyu Chan Pak Kwong School of Electrical and Electronic Engineering epkchan@ntu.edu.sg Engineering::Electrical and electronic engineering::Integrated circuits A new power supply rejection (PSR) based enhancer with small and stable dropout voltage is presented in this work. It is implemented using TSMC-40nm process technology and powered by 1.2V supply voltage. A number of circuit techniques are proposed in this work. These include the temperature compensation of Level-Shifted Flipped Voltage Follower (LSFVF), Complementary-To-Absolute Temperature (CTAT) current reference. The typical output voltage and dropout voltage of the enhancer is 1.1127V and 87.3mV, respectively. The Monte-Carlo simulation of this output voltage yields a mean T.C. of 29.4ppm/℃ from -20℃ and 80℃. Besides, the dropout voltage has been verified with good immunity against Process, Temperature and Process (PVT) variation through the worst-case simulation. Consuming only 4.75μA, the circuit can drive load up to 500μA to yield additional PSR improvement of 36dB and 20dB of PSR at 1 Hz and 1MHz, respectively for the analog circuit of interest. This is demonstrated through the application of enhancer on the instrumentation Differential Difference Amplifier (DDA) for sensing floating bridge sensor signal. The comparative Monte-Carlo simulation results on respective DDA circuit have revealed that the process sensitivity of output voltage of this work has achieved 14 times reduction with respect to that of the conventional counterpart over the operation temperature range in typical operation condition. Due to simplicity without voltage reference and operational amplifier(s), low power and small consumption of supply voltage headroom, the proposed work is very useful for supply noise sensitive analog circuits in mixed-signal applications. Master of Science (Electronics) 2021-12-20T02:37:48Z 2021-12-20T02:37:48Z 2021 Thesis-Master by Coursework Zhang, J. (2021). Design of a power supply rejection enhancer for analog circuits dedicated to mixed-signal environment. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/154245 https://hdl.handle.net/10356/154245 en ISM-DISS-02224 application/pdf Nanyang Technological University
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle Engineering::Electrical and electronic engineering::Integrated circuits
Zhang, Jianyu
Design of a power supply rejection enhancer for analog circuits dedicated to mixed-signal environment
description A new power supply rejection (PSR) based enhancer with small and stable dropout voltage is presented in this work. It is implemented using TSMC-40nm process technology and powered by 1.2V supply voltage. A number of circuit techniques are proposed in this work. These include the temperature compensation of Level-Shifted Flipped Voltage Follower (LSFVF), Complementary-To-Absolute Temperature (CTAT) current reference. The typical output voltage and dropout voltage of the enhancer is 1.1127V and 87.3mV, respectively. The Monte-Carlo simulation of this output voltage yields a mean T.C. of 29.4ppm/℃ from -20℃ and 80℃. Besides, the dropout voltage has been verified with good immunity against Process, Temperature and Process (PVT) variation through the worst-case simulation. Consuming only 4.75μA, the circuit can drive load up to 500μA to yield additional PSR improvement of 36dB and 20dB of PSR at 1 Hz and 1MHz, respectively for the analog circuit of interest. This is demonstrated through the application of enhancer on the instrumentation Differential Difference Amplifier (DDA) for sensing floating bridge sensor signal. The comparative Monte-Carlo simulation results on respective DDA circuit have revealed that the process sensitivity of output voltage of this work has achieved 14 times reduction with respect to that of the conventional counterpart over the operation temperature range in typical operation condition. Due to simplicity without voltage reference and operational amplifier(s), low power and small consumption of supply voltage headroom, the proposed work is very useful for supply noise sensitive analog circuits in mixed-signal applications.
author2 Chan Pak Kwong
author_facet Chan Pak Kwong
Zhang, Jianyu
format Thesis-Master by Coursework
author Zhang, Jianyu
author_sort Zhang, Jianyu
title Design of a power supply rejection enhancer for analog circuits dedicated to mixed-signal environment
title_short Design of a power supply rejection enhancer for analog circuits dedicated to mixed-signal environment
title_full Design of a power supply rejection enhancer for analog circuits dedicated to mixed-signal environment
title_fullStr Design of a power supply rejection enhancer for analog circuits dedicated to mixed-signal environment
title_full_unstemmed Design of a power supply rejection enhancer for analog circuits dedicated to mixed-signal environment
title_sort design of a power supply rejection enhancer for analog circuits dedicated to mixed-signal environment
publisher Nanyang Technological University
publishDate 2021
url https://hdl.handle.net/10356/154245
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