Investigation of charging phenomena in gold nanoparticle based organic memory device
Organic memories have a simple device design, offering the potential of uncomplicated integration and simple cell concepts with very small cell sizes. They are of low-cost since they are much simpler to manufacture than silicon chips and are easy to stack, packing bits at high density. Organic memor...
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Format: | Final Year Project |
Language: | English |
Published: |
2009
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Online Access: | http://hdl.handle.net/10356/15440 |
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Institution: | Nanyang Technological University |
Language: | English |
Summary: | Organic memories have a simple device design, offering the potential of uncomplicated integration and simple cell concepts with very small cell sizes. They are of low-cost since they are much simpler to manufacture than silicon chips and are easy to stack, packing bits at high density. Organic memories also have the extendibility to sensing, radio frequency identification (RFID) and passive or active matrix backplanes. Here, we demonstrated an organic memory device through the use of citrate-stabilized gold nanoparticles deposited on 3-aminopropyl-triethoxysilane (APTES) modified substrate surface. The possibility of realizing an organic memory device was demonstrated using a metal-pentacene-insulator-silicon (MPIS) capacitor with the citrate-stabilized gold nanoparticles and pentacene as the organic semiconductor layer. Capacitance-Voltage (C-V) measurements showed clear flat-band voltage, indicating charge trapping effect. The hysteresis window which indicates the flatband voltage, increased from 0.9737V to 1.5361V as the maximum operation bias increased from 3V to 7V. Besides pentacene, organic semiconductors such as CuPc, and organic insulators such as F16CuPc and PMMA were also experimented with the gold nanoparticles. C-V hysteresis windows were observed in devices incorporated F16CuPc and PMMA, with a memory window depending on the range of the voltage sweep. However, CuPc does not give a conclusive result due to trapping in reference device. A maximum hysteresis memory window of 4.05V was achieved by device with F16CuPc by varying the gate voltage between -30V and +30V. These results demonstrate that the chemical self-assembly method is a promising strategy for organic memory device applications. |
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