MRAM integration with L2 memory for a near threshold RISC-V core : implementing a low power IoT node for AI applications

• Main Author: Shantanu, Raoke
• Other Authors: Kim Tae Hyoung
• Format: Thesis-Master by Coursework
• Language: English
• Published: Nanyang Technological University 2022
• Subjects: Engineering::Electrical and electronic engineering::Integrated circuits; Engineering::Electrical and electronic engineering::Microelectronics
• Online Access: https://hdl.handle.net/10356/156009
• Institution: Nanyang Technological University

IoT edge devices of the past were designed primarily of sensors and a microcontroller that controlled the influx of data and the sensor operations. The microcontrollers had some pre-processing capabilities and their subsequent major task was to transmit this data to the central node where all the pr...