Optimizing selenization conditions of Cu2CdSn(S,Se)4
Copper zinc tin sulfide (Cu2ZnSnS4, CZTS) is a promising non-toxic and earth-abundant material for thin-film solar cell. However, its efficiency is hindered by a large open-circuit voltage deficit (VOC) due to intrinsic defects related to potential fluctuations and band tail states. By partially and...
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Format: | Final Year Project |
Language: | English |
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Nanyang Technological University
2022
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Online Access: | https://hdl.handle.net/10356/156226 |
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Institution: | Nanyang Technological University |
Language: | English |
Summary: | Copper zinc tin sulfide (Cu2ZnSnS4, CZTS) is a promising non-toxic and earth-abundant material for thin-film solar cell. However, its efficiency is hindered by a large open-circuit voltage deficit (VOC) due to intrinsic defects related to potential fluctuations and band tail states. By partially and fully substituting zinc with cadmium forming Cu2(Zn,Cd)SnS4 (CZCTS) and Cu2CdSnS4 (CCTS) respectively, structural disorder and defect clusters are reduced, increasing device’s efficiency. However, its efficiency is still significantly lower than existing thin film solar cells available in the market like Copper Indium Gallium Selenide (CIGS) and Cadmium Telluride (CdTe). Research has been done on selenizing CZTS forming Cu2ZnSn(S,Se)4 (CZTSSe) to further improve device’s efficiency by increasing grain size. By adjusting selenization condition, optimized microstructure can be obtained. Previous research has shown that varying heating rate and annealing time can reduce the fine grain layer, improving device’s overall efficiency. In this study, the effect of selenization temperature and selenium amount on the crystal structure, morphology, and J-V characteristics of selenized CCTSSe thin film is investigated. SEM images show that at higher selenization temperature bigger grains are formed with lesser voids. Selenization has also showed that it is able to reduce band gap and by adjusting S/Se ratio band gap can be adjusted. EDX results displayed that at annealing temperature of 560°C Cd/Sn ratio is the closest to 1.25, which is the optimized ratio. The J-V measurements of devices showed that at 560°C annealing temperature with 70mg of selenium, device is at peak performance. Recommendations are made to look further into the low bandgap of selenized CCTSSe thin film, whether there is an existence of a second phase and to further research on testing a device made with ideal heating rate with optimized annealing temperature, annealing time, and selenium amount. |
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