A pipelined educational simulator for the ARM processor

This paper proposes an approach to implement a pipelined ARM simulator for educational purposes. This simulator allows users to select various data and control hazards settings and display the details of the outcome in the application. Furthermore, there is a pipelined graph shown to illustrate a pi...

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Bibliographic Details
Main Author: Chia, Belinda Wei Qi
Other Authors: Smitha Kavallur Pisharath Gopi
Format: Final Year Project
Language:English
Published: Nanyang Technological University 2022
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Online Access:https://hdl.handle.net/10356/156375
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Institution: Nanyang Technological University
Language: English
Description
Summary:This paper proposes an approach to implement a pipelined ARM simulator for educational purposes. This simulator allows users to select various data and control hazards settings and display the details of the outcome in the application. Furthermore, there is a pipelined graph shown to illustrate a pipelined architecture. The ARM simulator is built on top of an existing ARM simulator ‘Bicep.js’. ‘Bicep.js’ is an open-source application that allow other programmers to modify and add on features to it. This report provides detailed documentation of the development of the simulator, which includes different aspects, problems faced and the implementation of the simulator.