Analysis and optimization of a deeply pipelined FPGA soft processor
FPGA soft processors have been shown to achieve high frequency when designed around the specific capabilities of heterogenous resources on modern FPGAs. However, such performance comes at a cost of deep pipelines, which can result in a larger number of idle cycles when executing programs with long d...
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Main Authors: | , , |
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Other Authors: | |
Format: | Conference or Workshop Item |
Language: | English |
Published: |
2015
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/81037 http://hdl.handle.net/10220/39115 |
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Institution: | Nanyang Technological University |
Language: | English |