Analysis and optimization of a deeply pipelined FPGA soft processor

FPGA soft processors have been shown to achieve high frequency when designed around the specific capabilities of heterogenous resources on modern FPGAs. However, such performance comes at a cost of deep pipelines, which can result in a larger number of idle cycles when executing programs with long d...

Full description

Saved in:
Bibliographic Details
Main Authors: Cheah, Hui Yan, Fahmy, Suhaib A., Kapre, Nachiket
Other Authors: School of Computer Engineering
Format: Conference or Workshop Item
Language:English
Published: 2015
Subjects:
Online Access:https://hdl.handle.net/10356/81037
http://hdl.handle.net/10220/39115
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English