Analysis and optimization of a deeply pipelined FPGA soft processor

• المؤلفون الرئيسيون: Cheah, Hui Yan, Fahmy, Suhaib A., Kapre, Nachiket
• مؤلفون آخرون: School of Computer Engineering
• التنسيق: Conference or Workshop Item
• اللغة: English
• منشور في: 2015
• الموضوعات: Computer Science and Engineering
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/81037; http://hdl.handle.net/10220/39115
• المؤسسة: Nanyang Technological University

FPGA soft processors have been shown to achieve high frequency when designed around the specific capabilities of heterogenous resources on modern FPGAs. However, such performance comes at a cost of deep pipelines, which can result in a larger number of idle cycles when executing programs with long d...