Hardware implementation of a power efficient CGRA with single-cycle multi-hop datapaths

Coarse-grained reconfigurable architectures (CGRAs) are computing architectures that provide word-level reconfigurability. CGRAs can achieve high throughput and high power efficiency, while maintaining post-fabrication computing flexibil- ity. In this dissertation, a 167-GOPS/W CGRA design with sing...

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書目詳細資料
主要作者: Su, Lingzhi
其他作者: Goh Wang Ling
格式: Thesis-Master by Coursework
語言:English
出版: Nanyang Technological University 2022
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在線閱讀:https://hdl.handle.net/10356/158595
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