Hardware implementation of a power efficient CGRA with single-cycle multi-hop datapaths

Coarse-grained reconfigurable architectures (CGRAs) are computing architectures that provide word-level reconfigurability. CGRAs can achieve high throughput and high power efficiency, while maintaining post-fabrication computing flexibil- ity. In this dissertation, a 167-GOPS/W CGRA design with sing...

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Bibliographic Details
Main Author: Su, Lingzhi
Other Authors: Goh Wang Ling
Format: Thesis-Master by Coursework
Language:English
Published: Nanyang Technological University 2022
Subjects:
Online Access:https://hdl.handle.net/10356/158595
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Institution: Nanyang Technological University
Language: English

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