Recovering accuracy of RRAM-based CIM for binarized neural network via Chip-in-the-loop training

Resistive random access memory (RRAM) based computing-in-memory (CIM) is attractive for edge artificial intelligence (AI) applications, thanks to its excellent energy efficiency, compactness and high parallelism in matrix vector multiplication (MatVec) operations. However, existing RRAM-based CIM de...

Full description

Saved in:
Bibliographic Details
Main Authors: Chong, Yi Sheng, Goh, Wang Ling, Ong, Yew Soon, Nambiar, Vishnu P., Do, Anh Tuan
Other Authors: School of Electrical and Electronic Engineering
Format: Conference or Workshop Item
Language:English
Published: 2022
Subjects:
Online Access:https://hdl.handle.net/10356/159308
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-159308
record_format dspace
spelling sg-ntu-dr.10356-1593082022-11-19T23:31:07Z Recovering accuracy of RRAM-based CIM for binarized neural network via Chip-in-the-loop training Chong, Yi Sheng Goh, Wang Ling Ong, Yew Soon Nambiar, Vishnu P. Do, Anh Tuan School of Electrical and Electronic Engineering School of Computer Science and Engineering Interdisciplinary Graduate School (IGS) 2022 IEEE International Symposium on Circuits and Systems (ISCAS) Energy Research Institute @ NTU (ERI@N) Engineering::Electrical and electronic engineering Binarized Neural Network Resistive Random Access Memory Compute-in-Memory Resistive random access memory (RRAM) based computing-in-memory (CIM) is attractive for edge artificial intelligence (AI) applications, thanks to its excellent energy efficiency, compactness and high parallelism in matrix vector multiplication (MatVec) operations. However, existing RRAM-based CIM designs often require complex programming scheme to precisely control the RRAM cells to reach the desired resistance states so that the neural network classification accuracy is maintained. This leads to large area and energy overhead as well as low RRAM area utilization. Hence, compact RRAMbased CIM with simple pulse-based programming scheme is thus more desirable. To achieve this, we propose a chip-in-the-loop training approach to compensate for the network performance drop due to the stochastic behavior of the RRAM cells. Note that, although the target RRAM cell here is a two-state RRAM (i.e binary, having only high and low resistance states), their inherent analog resistance values are used in the CIM operation. Our experiment using a 4-layer fully-connected binary neural network (BNN) showed that after retraining, the RRAM-based network accuracy can be recovered, regardless of the RRAM resistance distribution and RHRS/RLRS resistance ratio. Agency for Science, Technology and Research (A*STAR) Submitted/Accepted version We thank the Programmatic grant no. A1687b0033, Singapore RIE 2020, AME domain. 2022-11-17T02:36:07Z 2022-11-17T02:36:07Z 2022 Conference Paper Chong, Y. S., Goh, W. L., Ong, Y. S., Nambiar, V. P. & Do, A. T. (2022). Recovering accuracy of RRAM-based CIM for binarized neural network via Chip-in-the-loop training. 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2958-2962. https://dx.doi.org/10.1109/ISCAS48785.2022.9937271 https://hdl.handle.net/10356/159308 10.1109/ISCAS48785.2022.9937271 2958 2962 en A1687b0033 © 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/ISCAS48785.2022.9937271. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering::Electrical and electronic engineering
Binarized Neural Network
Resistive Random Access Memory
Compute-in-Memory
spellingShingle Engineering::Electrical and electronic engineering
Binarized Neural Network
Resistive Random Access Memory
Compute-in-Memory
Chong, Yi Sheng
Goh, Wang Ling
Ong, Yew Soon
Nambiar, Vishnu P.
Do, Anh Tuan
Recovering accuracy of RRAM-based CIM for binarized neural network via Chip-in-the-loop training
description Resistive random access memory (RRAM) based computing-in-memory (CIM) is attractive for edge artificial intelligence (AI) applications, thanks to its excellent energy efficiency, compactness and high parallelism in matrix vector multiplication (MatVec) operations. However, existing RRAM-based CIM designs often require complex programming scheme to precisely control the RRAM cells to reach the desired resistance states so that the neural network classification accuracy is maintained. This leads to large area and energy overhead as well as low RRAM area utilization. Hence, compact RRAMbased CIM with simple pulse-based programming scheme is thus more desirable. To achieve this, we propose a chip-in-the-loop training approach to compensate for the network performance drop due to the stochastic behavior of the RRAM cells. Note that, although the target RRAM cell here is a two-state RRAM (i.e binary, having only high and low resistance states), their inherent analog resistance values are used in the CIM operation. Our experiment using a 4-layer fully-connected binary neural network (BNN) showed that after retraining, the RRAM-based network accuracy can be recovered, regardless of the RRAM resistance distribution and RHRS/RLRS resistance ratio.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Chong, Yi Sheng
Goh, Wang Ling
Ong, Yew Soon
Nambiar, Vishnu P.
Do, Anh Tuan
format Conference or Workshop Item
author Chong, Yi Sheng
Goh, Wang Ling
Ong, Yew Soon
Nambiar, Vishnu P.
Do, Anh Tuan
author_sort Chong, Yi Sheng
title Recovering accuracy of RRAM-based CIM for binarized neural network via Chip-in-the-loop training
title_short Recovering accuracy of RRAM-based CIM for binarized neural network via Chip-in-the-loop training
title_full Recovering accuracy of RRAM-based CIM for binarized neural network via Chip-in-the-loop training
title_fullStr Recovering accuracy of RRAM-based CIM for binarized neural network via Chip-in-the-loop training
title_full_unstemmed Recovering accuracy of RRAM-based CIM for binarized neural network via Chip-in-the-loop training
title_sort recovering accuracy of rram-based cim for binarized neural network via chip-in-the-loop training
publishDate 2022
url https://hdl.handle.net/10356/159308
_version_ 1751548540376580096