Compact gesture recognition algorithm using tiny machine learning

• Main Author: Li, Junying
• Other Authors: Kim Tae Hyoung
• Format: Thesis-Master by Coursework
• Language: English
• Published: Nanyang Technological University 2023
• Subjects: Engineering::Electrical and electronic engineering
• Online Access: https://hdl.handle.net/10356/164136
• Institution: Nanyang Technological University

For gesture recognition based on convolution neural network, general processors are not efficient for CNN implementation and cannot meet performance requirements. Plenty of great works on implementing the convolution neural network on FPGA have been carried out in recent years. But it is still a very difficult task due to the complex computation of convolution, limited hardware resources, and high-speed requirements. In this project, a convolutional neural network of the leNet-5 architecture used for gesture recognition is implemented on FPGA. Four convolution structures are implemented and compared on FPGA in an attempt to reach the best compromise between parallelism, speed, and utilization. The hardware description language is Verilog. The hardware design and simulation kit are Vivado. The data nature is of floating-point numbers using the IEEE 754 standard and with implementations of both half-precision and full-precision variants. The network built with python has an accuracy of 97.5% and a loss of 1.047512 on the six-gesture classification task. The hardware resource utilization, power consumption, and clock cycles of each layer of the CNN implemented on FPGA are estimated and evaluated.