Dynamic damage analysis of thin film stacked structures for microelectronic devices
In the context of the megatrends of remote working, the development of artificial intelligence, and electric vehicle applications, there is a great demand for better-performing and multi-functional integrated circuit (IC) chips to fill the technology gaps. Moreover, the demand for package minimizati...
Saved in:
Main Author: | |
---|---|
Other Authors: | |
Format: | Thesis-Doctor of Philosophy |
Language: | English |
Published: |
Nanyang Technological University
2023
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/164832 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Summary: | In the context of the megatrends of remote working, the development of artificial intelligence, and electric vehicle applications, there is a great demand for better-performing and multi-functional integrated circuit (IC) chips to fill the technology gaps. Moreover, the demand for package minimization and rapid production of power electronic products have raised a serious concern about the robustness of thin-film stacked structures in the bond pad of IC chips, especially in the processes of wire-bonding, wafer probing, and die ejection.
Recently, hard copper (Cu) wires have been widely applied to replace traditional soft gold (Au) wires in the wire-bonding process. It is not only because the price of Cu wires is more competitive than that of Au wires, but also Cu wires possess superior electrical, mechanical, and thermal properties over Au wires. However, the dynamic contact between the Cu free air ball (FAB) and the bond pad surface leads to excessive deformation and thus significant damage or failure in the brittle substrate beneath the top metallization pad of IC chips. Moreover, the damaged sites are invisible, which makes it difficult to predict their occurrences. Hence, this research aims to study the dynamic deformation and damage behavior of the thin-film stacked structure during high strain-rate indentation loading through experimental, statistical, and analytical methods.
First, a dynamic strain-rate (DSR) model has been developed for analyzing the dynamic response of a thin-film stacked structure consisting of a top metallization layer (copper–titanium CuTi) and an intermediate dielectric layer (silicon nitride Si3N4) on the Si substrate at varying loading rates. In the DSR model, the exponential indentation strain rate–time history is established by maintaining the constant ratio of the instantaneous loading rate to load (Ṗ/P) in the indentation tests. The relationship between the indentation strain rate and indentation strain at different Ṗ/P was analyzed for characterizing the DSR model. The indentation stress–strain curves at different testing protocols were plotted to investigate the rate-dependent behaviors of the thin-film stacked structure.
Second, DSR indentation tests integrated with the acoustic emission (AE) sensing technique were conducted on a Si (100) wafer to investigate the phase transformation at low and high Ṗ/P. The occurrence of phase transformation was detected by an AE event and corresponds to an onset load. It was found that high Ṗ/P leads to a decrease in the phase transformation threshold, which could be attributed to an increase in the shear stress with increasing strain rates. The activation volume V* for the onset of phase transformation was determined based on two methods of the strain rate sensitivity and the nucleation theory-based model. Both analysis methods yield comparable V* and well proximate the size of the nucleated β-Sn phase, suggesting that the phase transformation is predominantly induced by shearing under the non-hydrostatic condition. Moreover, an increase in the maximum shear stress with increasing strain rates demonstrates the framework of a thermally activated process, which was responsible for triggering the phase transformation in the Si wafer.
Third, the deformation and the damage behaviors of the thin-film stacked structure consisting of a top metallization layer (aluminum Al) and an intermediate dielectric layer (silicon oxide SiO2) on the Si substrate were characterized at low and high Ṗ/P. An AE sensor was used to detect damages in the specimens during the indentation loading–unloading cycles. The onset loads PAE and AE signal parameters, i.e., peak amplitude and AE energy, were examined upon the occurrence of the first damage. An energy-based method is proposed to determine the work done by the indenter that caused damage to the Si substrate. The work of damage Wd was determined based on the difference in the elastic strain energy between the damage and non-damage indentations, which is justified by the detection of AE on the same specimen and indentation under the same loading condition. It is found that less energy is consumed to yield the specimen at high Ṗ/P. Moreover, crossed slip bands were observed on the surface of the Si substrate for the damage indentations. When the specimens were loaded up to the second PAE, radius cracks were observed on the surface of the Si substrate under the high Ṗ/P loading condition, which did not appear at low Ṗ/P. The method of determining the fracture toughness Kc of the Si substrate in the thin-film stacked specimen was developed considering plasticity in crack extension.
This PhD study contributes to the understanding of the deformation and damage behavior of thin-film stacked structures subjected to dynamic indentation loading. It is essential in the high-speed wire bonding, die ejection, and wafer probing processes, where dynamic characteristics of the new-designed bond pad structures can be taken into account and handled with care. Moreover, the methodology can be used to characterize the mechanical behavior of the newly designed bond pads during the actual processing conditions. It will save time in the design process and improve the product quality and quantity, which eventually helps to ease the current chip shortage. |
---|