16-bit low power digital FIR filter IC design

• Main Author: Hu, Mengqi
• Other Authors: Gwee Bah Hwee
• Format: Thesis-Master by Coursework
• Language: English
• Published: Nanyang Technological University 2023
• Subjects: Engineering::Electrical and electronic engineering
• Online Access: https://hdl.handle.net/10356/166246
• Institution: Nanyang Technological University

A digital filter is an essential component of digital signal processing systems due to its various advantages. Among them, the FIR filter is particularly appreciated for its linear phase characteristics. However, with the increase of integration, the reduction of process line width and the increase of computing speed in recent decades, the power consumption has become a non- negligible element in circuit design. In this thesis, the main focus is on the ASIC design of low power FIR filter. In this thesis, the development trend of semiconductor integrated circuits and the difficulties faced nowadays are firstly introduced. Then, the merits of research into low power techniques are described. Following that, two types of digital filters are introduced, as well as the basic working principle of FIR filters with different implementation architectures. The components of digital circuit power consumption are also mentioned. Finally, the design and implementation methods of a standard 16-bit filter based on multiplicative-additive structure are presented. Furthermore, beginning with the adders and multipliers that constitute the filter, a low-power FIR filter design based on parallel multiplication is proposed. And from the synthesis results generated, it can be concluded that the power consumption and the area occupied can be effectively decreased by the optimized FIR filter. The proposed FIR filter is 75% smaller than and 43% lower power than the benchmark filter.