Design of memory controllers and input/output controller for low-voltage asynchronous digital signal processor

• 主要作者: Low, Joshua Yung Lih.
• 其他作者: Gwee Bah Hwee
• 格式: Final Year Project
• 語言: English
• 出版: 2009
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Control and instrumentation::Control engineering
• 在線閱讀: http://hdl.handle.net/10356/16698
• 機構: Nanyang Technological University

This project encompasses the generation of memory blocks, design and implementation of memory and input/output (IO) controllers for a low voltage (1.25V) asynchronous DSP56002 design. DSP56002, from the DSP56K Family, is Motorola’s series of 24-bit general purpose Digital Signal Processor. There...