17.8 A single-channel 10GS/s 8b>36.4d8 SNDR time-domain ADC featuring loop-unrolled asynchronous successive approximation in 28nm CMOS

• Main Authors: Chen, Qian, Liang, Yuan, Boon, Chirn Chye, Liu, Qing
• Other Authors: School of Electrical and Electronic Engineering
• Format: Conference or Workshop Item
• Language: English
• Published: 2023
• Subjects: Engineering::Electrical and electronic engineering; Quantization (Signal); Prototypes
• Online Access: https://hdl.handle.net/10356/167254
• Institution: Nanyang Technological University

High data throughput and wideband network communications demand high-speed (several to tens of GS/s), moderate-resolution (6-10b) ADCs. The emerging time-domain ADC (TD-ADC) has been gaining more interest because of its energy efficiency and area efficiency [1,2], providing a promising solution f...