Accelerating gustavson-based SpMM on embedded FPGAs with element-wise parallelism and access pattern-aware caches
The Gustavson’s algorithm (i.e., the row-wise product algorithm) shows its potential as the backbone algorithm for sparse matrix-matrix multiplication (SpMM) on hardware accelerators. However, it still suffers from irregular memory accesses and thus its performance is bounded by the off-chip memory...
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| Main Authors: | , |
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| 格式: | Conference or Workshop Item |
| 語言: | English |
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2023
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| 主題: | |
| 在線閱讀: | https://hdl.handle.net/10356/167477 |
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