Automated standard cell circuit recognition for hardware security and assurance

As modern technologies become ever more complex, a premium is placed on miniaturization and space-saving. Space-saving, being one of integrated circuits’ (ICs) main benefits, has allowed it to play a crucial role in modern technologies. As integrated circuits are extremely small and lightweight, it...

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Bibliographic Details
Main Author: Qin,Wei Jian
Other Authors: Gwee Bah Hwee
Format: Final Year Project
Language:English
Published: Nanyang Technological University 2023
Subjects:
Online Access:https://hdl.handle.net/10356/167578
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Institution: Nanyang Technological University
Language: English
Description
Summary:As modern technologies become ever more complex, a premium is placed on miniaturization and space-saving. Space-saving, being one of integrated circuits’ (ICs) main benefits, has allowed it to play a crucial role in modern technologies. As integrated circuits are extremely small and lightweight, it saves the hassle of using heavy processors and large components while still allows the processing of high levels of complex logic. Today, an IC chip the size of a coin may contain billions of transistors, and this number is only project to grow as technology advances, with Intel intending to achieve 1 trillion transistors by 2030. For security and assurance purposes, ICs are frequently required to be examined and analyzed post-fabrication. As individual transistors are too small to be seen with the naked eye on the modern-day IC chip, a Scanning Electron Microscope (SEM) is used to take images of the underlying circuits for analysis. Due to the extremely high complexity of the SEM circuit images, it is of key interest to develop ways to analyze and recognize the functionalities of circuits in the scanned images for hardware security purposes. As such, we have endeavored to develop a prototype code for automated circuit recognition in SEM images to replace manual circuit recognition. This project is structured into three distinct phases. The first phase involves identifying key areas of interests in the SEM images through image processing and image segmentation techniques to locate circuit components. The second phase focuses on identifying the relationships between the identified circuit components, such that we can analyze and collate them into relevant data. The final phase involves obtaining the overall functionality of the circuit identified in the SEM image. The prototype code developed in this project achieved the goal of automated identification of SEM image functionality and can produce clear and detailed Netlist representation throughs the identified relationships between circuit elements. The prototype code is also able to display a suitable degree of flexibility as it was proven to be able to work with multiple types of SEM images.