Design of CMOS Ising machine for combinatorial optimization problems

• Main Author: Su, Yuqi
• Other Authors: Kim Tae Hyoung
• Format: Thesis-Doctor of Philosophy
• Language: English
• Published: Nanyang Technological University 2023
• Subjects: Engineering::Electrical and electronic engineering
• Online Access: https://hdl.handle.net/10356/169020
• Institution: Nanyang Technological University

Combinatorial optimization problems (COPs), a subfield of mathematics, have significant importance in various fields, including artificial intelligence, machine learning, and software engineering. However, some COPs are ill-suited to conventional computers, as no efficient algorithms could provide their solution within polynomial time. A new computer architecture, the Ising machine, has been seen as a potential accelerator for solving COPs thanks to its high efficiency and straightforward hardware mapping. Compared to the quantum or optical Ising machine, the CMOS technology based Ising machine recently attracted much attention as a low-cost alternative. Nevertheless, there is significant room for improvement in this emerging area. In our works, we first built a digital compute-in-memory Ising machine, achieved 22 times speed up and more than 10x energy efficiency. Secondly, we built a reconfigurable Ising machine for solving a more general class of COPs. However, such circuits suffer from high area overhead due to complex multipliers and adders. To address the above issues, we proposed a memory centralized Ising machine with 8bit interaction coefficients and 12bit multiply-and-accumulate operators. It achieves 5-10 times area reduction and features chip-to-chip interfaces.