Analog smart I/O pads

Electrostatic discharge (ESD) is one of the leading causes of microchip failure during manufacture as well as field and consumer use [National Semiconductor Corporation]. ESD is an increasingly significant problem in integrated circuit design as increasing pin counts and faster circuit speeds compou...

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Main Author: Tan, Shyue Mei.
Other Authors: Chan Pak Kwong
Format: Final Year Project
Language:English
Published: 2009
Subjects:
Online Access:http://hdl.handle.net/10356/16924
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-169242023-07-07T16:37:39Z Analog smart I/O pads Tan, Shyue Mei. Chan Pak Kwong School of Electrical and Electronic Engineering Centre for Integrated Circuits and Systems DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits Electrostatic discharge (ESD) is one of the leading causes of microchip failure during manufacture as well as field and consumer use [National Semiconductor Corporation]. ESD is an increasingly significant problem in integrated circuit design as increasing pin counts and faster circuit speeds compound the need for more and better reliable ESD protection. ESD refers to the phenomena whereby a high energy electrical discharge of current is produced at the input and/or output nodes of integrated circuit as a consequence of static charge build-up on an IC package. The buildup of static charge can be due to human body handling the IC or contribute by IC manufacturing handling equipment. Electrostatic discharge from a person has the potential to disable or destroy an entire integrated circuit. As a result, lot of effort putting on circuit design was thrown down the drain. Therefore, a well design on-chip protection circuit is crucial and essential in overcoming the ESD issue. Moreover, the analog buffer is designed for the purpose of driving the analog voltage as closely as possible with the input voltage. Likewise, the output sweep range will be increase by proposing the use of native NMOS and low threshold voltage NMOS. Not only that, the 3dB frequency bandwidth can be achieved up to 25MHz and the THD is below 0.5%. In this project, a complete on-chip ESD protection circuit has been constructed in a form of library cell. Besides that, the analog buffer is added with the ESD protection in the output pad. The effectiveness of the ESD protection pad and the accuracy of the analog buffer are investigated through post simulation and circuit simulation respectively. This technique has been successful in protecting the MOS devices used to fabricate analog, digital and mixed signal circuits. Bachelor of Engineering 2009-05-29T01:52:13Z 2009-05-29T01:52:13Z 2009 2009 Final Year Project (FYP) http://hdl.handle.net/10356/16924 en Nanyang Technological University 75 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Tan, Shyue Mei.
Analog smart I/O pads
description Electrostatic discharge (ESD) is one of the leading causes of microchip failure during manufacture as well as field and consumer use [National Semiconductor Corporation]. ESD is an increasingly significant problem in integrated circuit design as increasing pin counts and faster circuit speeds compound the need for more and better reliable ESD protection. ESD refers to the phenomena whereby a high energy electrical discharge of current is produced at the input and/or output nodes of integrated circuit as a consequence of static charge build-up on an IC package. The buildup of static charge can be due to human body handling the IC or contribute by IC manufacturing handling equipment. Electrostatic discharge from a person has the potential to disable or destroy an entire integrated circuit. As a result, lot of effort putting on circuit design was thrown down the drain. Therefore, a well design on-chip protection circuit is crucial and essential in overcoming the ESD issue. Moreover, the analog buffer is designed for the purpose of driving the analog voltage as closely as possible with the input voltage. Likewise, the output sweep range will be increase by proposing the use of native NMOS and low threshold voltage NMOS. Not only that, the 3dB frequency bandwidth can be achieved up to 25MHz and the THD is below 0.5%. In this project, a complete on-chip ESD protection circuit has been constructed in a form of library cell. Besides that, the analog buffer is added with the ESD protection in the output pad. The effectiveness of the ESD protection pad and the accuracy of the analog buffer are investigated through post simulation and circuit simulation respectively. This technique has been successful in protecting the MOS devices used to fabricate analog, digital and mixed signal circuits.
author2 Chan Pak Kwong
author_facet Chan Pak Kwong
Tan, Shyue Mei.
format Final Year Project
author Tan, Shyue Mei.
author_sort Tan, Shyue Mei.
title Analog smart I/O pads
title_short Analog smart I/O pads
title_full Analog smart I/O pads
title_fullStr Analog smart I/O pads
title_full_unstemmed Analog smart I/O pads
title_sort analog smart i/o pads
publishDate 2009
url http://hdl.handle.net/10356/16924
_version_ 1772829085594025984