Gate-level hardware priority resolvers for embedded systems
An N-bit priority resolver having N inputs and N outputs functions as polling hardware in an embedded system, enabling access to a resource when multiple devices initiate access requests at its inputs which may be located on-chip or off-chip. Subsystems such as data buses, comparators, fixed- and fl...
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Main Authors: | Balasubramanian, Padmanabhan, Maskell, Douglas Leslie |
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Other Authors: | School of Computer Science and Engineering |
Format: | Article |
Language: | English |
Published: |
2024
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/175430 |
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Institution: | Nanyang Technological University |
Language: | English |
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