Exploring network-on-chip architectures: performance optimization and experimental analysis

The rapid evolution of technology has given rise to a variety of new applications that require enhanced computational capabilities. Multi-core processors are therefore necessary in meeting these demands, yet optimizing their interconnectivity remains a challenge. The existing Network-On-Chip (NoC...

Full description

Saved in:
Bibliographic Details
Main Author: Wong, Adelina Ting Wen
Other Authors: Weichen Liu
Format: Final Year Project
Language:English
Published: Nanyang Technological University 2024
Subjects:
Online Access:https://hdl.handle.net/10356/175438
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English

Similar Items