SRAM based computing-in-memory for tiny machine learning
This dissertation investigates the potential of Computing-In-Memory (CIM) using Static Random-Access Memory (SRAM) to address the limitations of the Von Neumann architecture and to increase miniaturisation. This research aims to overcome this bottleneck by enabling in-memory computation for tiny mac...
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Nanyang Technological University
2024
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sg-ntu-dr.10356-1754982024-04-26T16:00:56Z SRAM based computing-in-memory for tiny machine learning Gupta, Shini Kim Tae Hyoung School of Electrical and Electronic Engineering THKIM@ntu.edu.sg Engineering SRAM Computing in memory Tiny machine learning This dissertation investigates the potential of Computing-In-Memory (CIM) using Static Random-Access Memory (SRAM) to address the limitations of the Von Neumann architecture and to increase miniaturisation. This research aims to overcome this bottleneck by enabling in-memory computation for tiny machine learning applications like BNN. Two SRAM cell architectures: 6-transistor (6T) and 8-transistor (8T) are investigated. Simulations performed using Cadence Virtuoso using TSMC 65nm Library demonstrate that both cells give correct value for write, hold, read operations but for MAC operations the 8T cell exhibits superior stability compared to the 6T design. Furthermore, the implementation of a 64-bit memory array capable of performing 8-row MAC operations was investigated . This paves the way for efficient in-memory computing suitable for Tiny machine learning applications. Master's degree 2024-04-26T02:54:24Z 2024-04-26T02:54:24Z 2024 Thesis-Master by Coursework Gupta, S. (2024). SRAM based computing-in-memory for tiny machine learning. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/175498 https://hdl.handle.net/10356/175498 en application/pdf Nanyang Technological University |
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Engineering SRAM Computing in memory Tiny machine learning |
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Engineering SRAM Computing in memory Tiny machine learning Gupta, Shini SRAM based computing-in-memory for tiny machine learning |
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This dissertation investigates the potential of Computing-In-Memory (CIM) using Static Random-Access Memory (SRAM) to address the limitations of the Von Neumann architecture and to increase miniaturisation. This research aims to overcome this bottleneck by enabling in-memory computation for tiny machine learning applications like BNN. Two SRAM cell architectures: 6-transistor (6T) and 8-transistor (8T) are investigated. Simulations performed using Cadence Virtuoso using TSMC 65nm Library demonstrate that both cells give correct value for write, hold, read operations but for MAC operations the 8T cell exhibits superior stability compared to the 6T design. Furthermore, the implementation of a 64-bit memory array capable of performing 8-row MAC operations was investigated . This paves the way for efficient in-memory computing suitable for Tiny machine learning applications. |
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Kim Tae Hyoung |
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Kim Tae Hyoung Gupta, Shini |
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Thesis-Master by Coursework |
author |
Gupta, Shini |
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Gupta, Shini |
title |
SRAM based computing-in-memory for tiny machine learning |
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SRAM based computing-in-memory for tiny machine learning |
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SRAM based computing-in-memory for tiny machine learning |
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SRAM based computing-in-memory for tiny machine learning |
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SRAM based computing-in-memory for tiny machine learning |
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sram based computing-in-memory for tiny machine learning |
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Nanyang Technological University |
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2024 |
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https://hdl.handle.net/10356/175498 |
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1800916121379930112 |