A 0.4 V 12T 2RW dual-port SRAM with suppressed common-row-access disturbance

Dual-port SRAMs with two sets of address bus and data IOs are widely employed in various applications to increase throughput. Conventional 8T dual-port SRAM suffers reliability issue at low voltages due to common-row-access disturbance. Specifically, a row is simultaneously accessed by two operation...

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Bibliographic Details
Main Authors: Wang, Bo, Zhou, Jun, Kim, Tony Tae-Hyoung
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2018
Subjects:
Online Access:https://hdl.handle.net/10356/88027
http://hdl.handle.net/10220/44496
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Institution: Nanyang Technological University
Language: English