CLAHE HLS implementation on Zynq SoC FPGA
Infrared (IR) imaging is pivotal for military applications, facilitating detection in low-light scenarios. However, conventional IR images often suffer from contrast issues, particularly when displaying high and low-temperature objects in the same scene. This leads to a loss of contrast in the whole...
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| Format: | Final Year Project |
| Language: | English |
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Nanyang Technological University
2024
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| Online Access: | https://hdl.handle.net/10356/176412 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | Infrared (IR) imaging is pivotal for military applications, facilitating detection in low-light scenarios. However, conventional IR images often suffer from contrast issues, particularly when displaying high and low-temperature objects in the same scene. This leads to a loss of contrast in the whole image. Contrast Limiting Adaptive Histogram Equalization (CLAHE) emerges as a solution, enhancing image quality by segmenting the image into tiles and applying histogram equalization techniques. This paper proposes the implementation of CLAHE on a Field Programmable Gate Array (FPGA), leveraging its real-time data processing capabilities. By employing High-Level Synthesis (HLS), the algorithm's execution on FPGA promises significant contrast enhancement, surpassing conventional methods like histogram equalization. The envisioned FPGA-based CLAHE system aims to offer superior IR image contrast crucial for military surveillance and reconnaissance applications |
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