Preparation of 2D dielectric F-Mica and its application in field-effect transistors

With the burgeoning parasitic effects that comes with scaling silicon-based transistors to their physical limit, silicon designers have resorted to multiple gate technologies such as gate-all-around (GAA) technology to reduce transistor gate pitch in a bid to further increase transistor density....

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Bibliographic Details
Main Author: Yau, Lucas Hong Ming
Other Authors: Tay Beng Kang
Format: Final Year Project
Language:English
Published: Nanyang Technological University 2024
Subjects:
Online Access:https://hdl.handle.net/10356/176434
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Institution: Nanyang Technological University
Language: English
Description
Summary:With the burgeoning parasitic effects that comes with scaling silicon-based transistors to their physical limit, silicon designers have resorted to multiple gate technologies such as gate-all-around (GAA) technology to reduce transistor gate pitch in a bid to further increase transistor density. However, as silicon-based transistors approaches its fundamental limit, technologies that are beyond silicon have generated a lot of interest due to their intrinsic properties that allow it to operate at a smaller scale without suffering from parasitic effects. One such technology is the two-dimensional field-effect transistor (2D FET) which utilizes 2D materials, particularly transition metal dichalcogenides (TMD), as its channel region that has no dangling bonds. This allows for superior carrier mobility to silicon-based transistors when body is scaled beyond 3 nm. However, TMDs intrinsic properties cannot be benefited from a direct implementation into current node technology. Conventional dielectrics introduce defects that severely hamper mobility in TMDs such as Molybdenum disulfide (MoS2), causing for poor electrical device performance. In this project, we investigate a possible solution that utilises novel 2D material dielectrics which may aid in enabling superior 2D FETs device performance to be unhindered. Our 2D dielectric of choice, Fluorphlogopite (F-Mica), is first prepared into thin layers via mechanical exfoliation. These samples are then either used in the initial material characterisation of F-Mica or used in the device fabrication of metal-insulator-metal and 2D FET. The fabrication process is then described at length, comprising of spin coating, photolithograph and physical vapour deposition. The fabricated devices are then tested to study their electrical performance in order to assess F-Mica’s viability as a 2D dielectric.