Design of CMOS buffer

• Main Author: Chan, Khang Yie
• Other Authors: Chan Pak Kwong
• Format: Final Year Project
• Language: English
• Published: Nanyang Technological University 2024
• Subjects: Engineering; CMOS buffer
• Online Access: https://hdl.handle.net/10356/176825
• Institution: Nanyang Technological University

Low voltage buffer plays a vital role in modern world due to the industry of IoT, medical device, consumer electronic, energy harvesting and wearable technology is growing tremendously. Hence, it is crucial to design a low voltage buffer. This report introduces a low voltage buffer design by applying the subthreshold working region to the transistors to achieve low voltage and wide output swing range. The buffer designed is applied with shunt feedback to decrease the output impedance. The buffer is also embedded to an operational transconductance amplifier (OTA) to form an operational amplifier. The OTA is designed by using folded cascode topology and the transistors are biased in subthreshold region to achieve high output swing. The input stage of the OTA is the complimentary input stage to achieve rail-to-rail input common mode range. The transistors are also biased in subthreshold region to achieve high transconductance, hence provide high gain. The final circuit is an operational amplifier with embedded buffer and the performance is discussed.