Design of a low dropout voltage regulator (LDO) with an embedded current-mode voltage reference without the use of BJT
This report proposes a MOSFET-only design of the Low-power, Low-voltage, Low Dropout (LDO) Voltage regular with an embedded voltage reference in current-mode operation. The LDO can generate 0.7V regulated voltage over a wide supply voltage range from 0.9 V to 1.5 V with a line regulation of 6.4 m...
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2024
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sg-ntu-dr.10356-1769882024-05-24T15:45:46Z Design of a low dropout voltage regulator (LDO) with an embedded current-mode voltage reference without the use of BJT Jiang, Xuewei Siek Liter School of Electrical and Electronic Engineering ELSIEK@ntu.edu.sg Engineering This report proposes a MOSFET-only design of the Low-power, Low-voltage, Low Dropout (LDO) Voltage regular with an embedded voltage reference in current-mode operation. The LDO can generate 0.7V regulated voltage over a wide supply voltage range from 0.9 V to 1.5 V with a line regulation of 6.4 mV / V and load regulation of 8.22 uV / A. In the full load condition, the LDO is capable of providing 20mA with 0.9V input voltage. With NMOS in subthreshold, the design allows the LDO circuit to operate with low current and power consumption to perform a 14.4 ppm/°C temperature coefficient under full load conditions in the range from -30°C to 110°C. The design process is done using the virtuoso tool in the Linux system with Global Foundries 55nm BCD-lite technology. Bachelor's degree 2024-05-24T06:06:31Z 2024-05-24T06:06:31Z 2024 Final Year Project (FYP) Jiang, X. (2024). Design of a low dropout voltage regulator (LDO) with an embedded current-mode voltage reference without the use of BJT. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/176988 https://hdl.handle.net/10356/176988 en A2205-231 application/pdf Nanyang Technological University |
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Engineering Jiang, Xuewei Design of a low dropout voltage regulator (LDO) with an embedded current-mode voltage reference without the use of BJT |
description |
This report proposes a MOSFET-only design of the Low-power, Low-voltage, Low
Dropout (LDO) Voltage regular with an embedded voltage reference in current-mode
operation. The LDO can generate 0.7V regulated voltage over a wide supply voltage
range from 0.9 V to 1.5 V with a line regulation of 6.4 mV / V and load regulation of
8.22 uV / A. In the full load condition, the LDO is capable of providing 20mA with
0.9V input voltage. With NMOS in subthreshold, the design allows the LDO circuit
to operate with low current and power consumption to perform a 14.4 ppm/°C
temperature coefficient under full load conditions in the range from -30°C to 110°C.
The design process is done using the virtuoso tool in the Linux system with Global
Foundries 55nm BCD-lite technology. |
author2 |
Siek Liter |
author_facet |
Siek Liter Jiang, Xuewei |
format |
Final Year Project |
author |
Jiang, Xuewei |
author_sort |
Jiang, Xuewei |
title |
Design of a low dropout voltage regulator (LDO) with an embedded current-mode voltage reference without the use of BJT |
title_short |
Design of a low dropout voltage regulator (LDO) with an embedded current-mode voltage reference without the use of BJT |
title_full |
Design of a low dropout voltage regulator (LDO) with an embedded current-mode voltage reference without the use of BJT |
title_fullStr |
Design of a low dropout voltage regulator (LDO) with an embedded current-mode voltage reference without the use of BJT |
title_full_unstemmed |
Design of a low dropout voltage regulator (LDO) with an embedded current-mode voltage reference without the use of BJT |
title_sort |
design of a low dropout voltage regulator (ldo) with an embedded current-mode voltage reference without the use of bjt |
publisher |
Nanyang Technological University |
publishDate |
2024 |
url |
https://hdl.handle.net/10356/176988 |
_version_ |
1806059770450280448 |