Cryogenic temperature resilient digital circuit design
This project presents the design of standard cells optimized for cryogenic temperature in TSMC 28nm technology. Quantum computing has garnered significant attention for its potential to revolutionize complex computational tasks with unparalleled energy efficiency. However, the operation of quantum c...
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Format: | Final Year Project |
Language: | English |
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Nanyang Technological University
2024
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Online Access: | https://hdl.handle.net/10356/177025 |
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Institution: | Nanyang Technological University |
Language: | English |
Summary: | This project presents the design of standard cells optimized for cryogenic temperature in TSMC 28nm technology. Quantum computing has garnered significant attention for its potential to revolutionize complex computational tasks with unparalleled energy efficiency. However, the operation of quantum computers relies on qubits, necessitating control electronics capable of operating at extremely low temperatures (mK range) while maintaining high-speed performance (few GHz). Conventional CMOS transistors exhibit altered properties at such temperatures, demanding the redesign of digital cells for quantum control applications. This project focuses on analyzing and optimizing the most important standard digital cells which are inverter, D flip-flop and 4 bits gray code counter to provide high-speed, low-power functional building blocks for quantum control applications. Through simulation, the project aims to address the unique challenges posed by cryogenic temperature operation and optimize standard cells to ensure functionality under such conditions while having low power and high-speed performance. Performance of the design will be compared with ARM standard cells. Insights gained and circuit designed from this research contribute to advancing quantum technology and pave the way for the development of efficient control electronics for quantum computing applications. |
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