Cryogenic temperature resilient digital circuit design

This project presents the design of standard cells optimized for cryogenic temperature in TSMC 28nm technology. Quantum computing has garnered significant attention for its potential to revolutionize complex computational tasks with unparalleled energy efficiency. However, the operation of quantum c...

全面介紹

Saved in:
書目詳細資料
主要作者: Jong, Kelvin Keong Hua
其他作者: Goh Wang Ling
格式: Final Year Project
語言:English
出版: Nanyang Technological University 2024
主題:
EEE
在線閱讀:https://hdl.handle.net/10356/177025
標簽: 添加標簽
沒有標簽, 成為第一個標記此記錄!
機構: Nanyang Technological University
語言: English
實物特徵
總結:This project presents the design of standard cells optimized for cryogenic temperature in TSMC 28nm technology. Quantum computing has garnered significant attention for its potential to revolutionize complex computational tasks with unparalleled energy efficiency. However, the operation of quantum computers relies on qubits, necessitating control electronics capable of operating at extremely low temperatures (mK range) while maintaining high-speed performance (few GHz). Conventional CMOS transistors exhibit altered properties at such temperatures, demanding the redesign of digital cells for quantum control applications. This project focuses on analyzing and optimizing the most important standard digital cells which are inverter, D flip-flop and 4 bits gray code counter to provide high-speed, low-power functional building blocks for quantum control applications. Through simulation, the project aims to address the unique challenges posed by cryogenic temperature operation and optimize standard cells to ensure functionality under such conditions while having low power and high-speed performance. Performance of the design will be compared with ARM standard cells. Insights gained and circuit designed from this research contribute to advancing quantum technology and pave the way for the development of efficient control electronics for quantum computing applications.