Current-induced domain wall NOT gate logic operation via chirality flipping by exploiting Walker breakdown

Current-induced domain wall (DW) motion in ferromagnetic nanostructures is an important research area to realize spin-based logic devices. Using micromagnetic simulations, we have designed and demonstrated a NOT gate logic operation via DW chirality flipping in a ferromagnetic nanostructure with an...

全面介紹

Saved in:
書目詳細資料
Main Authors: Haragopal, Vemuru, Jaiswal, Rohan, Kannan, Vijayanandhini, Murapaka, Chandrasekhar, Lew, Wen Siang
其他作者: School of Physical and Mathematical Sciences
格式: Article
語言:English
出版: 2024
主題:
在線閱讀:https://hdl.handle.net/10356/177954
標簽: 添加標簽
沒有標簽, 成為第一個標記此記錄!
機構: Nanyang Technological University
語言: English
實物特徵
總結:Current-induced domain wall (DW) motion in ferromagnetic nanostructures is an important research area to realize spin-based logic devices. Using micromagnetic simulations, we have designed and demonstrated a NOT gate logic operation via DW chirality flipping in a ferromagnetic nanostructure with an anti-dot. The DW chirality flipping is due to the Walker breakdown occurring at the anti-dot structure. The DW configuration transforms from a transverse DW (TDW) to an anti-vortex DW and back to TDW, however, with opposite chirality when driven by a particular current density. The device is capable of bidirectional operation, wherein the DW driven in both directions undergoes chirality flipping. The DW speed is a critical parameter for the logic operation. The dimensions of the anti-dot govern the DW speed; thus, the successful operation is seen only below the critical anti-dot width. Moreover, the DW needs to travel a certain distance before it can undergo Walker breakdown, making the anti-dot length also a key parameter. Finally, the current density is a pivotal factor in the logic-gate operation. At relatively lower current densities, the DW does not undergo Walker breakdown, whereas it may undergo Walker breakdown with several transformations before it reaches the output at higher current densities. We have shown the window of successful NOT gate logic operation, as a function of anti-dot width, length, and current density.