The design of a CMOS only low-power low-voltage low-dropout voltage regulator (LDO) with an embedded voltage reference

This report presented a transient-enhanced low dropout voltage (LDO) regulator with an integrated push-pull composite power transistor and an embedded voltage reference (VR). The use of a composite power transistor shifts parasitic poles to higher frequencies, enhancing stability. A recycling folded...

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Main Author:	Xie, Xinzhe
Other Authors:	Siek Liter
Format:	Final Year Project
Language:	English
Published:	Nanyang Technological University 2024
Subjects:	Engineering Low-dropout (LDO) voltage regulator Bandgap Voltage reference (VR) CMOS
Online Access:	https://hdl.handle.net/10356/178418
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Institution:	Nanyang Technological University
Language:	English

id	sg-ntu-dr.10356-178418
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spelling	sg-ntu-dr.10356-1784182024-06-21T15:42:56Z The design of a CMOS only low-power low-voltage low-dropout voltage regulator (LDO) with an embedded voltage reference Xie, Xinzhe Siek Liter School of Electrical and Electronic Engineering ELSIEK@ntu.edu.sg Engineering Low-dropout (LDO) voltage regulator Bandgap Voltage reference (VR) CMOS This report presented a transient-enhanced low dropout voltage (LDO) regulator with an integrated push-pull composite power transistor and an embedded voltage reference (VR). The use of a composite power transistor shifts parasitic poles to higher frequencies, enhancing stability. A recycling folded cascode (RFC) amplifier achieves higher loop gain, improving load and line regulation. A recovery time enhancement circuit reduces overshoot recovery. The VR employs various resistor types for high-order compensation, with trimming ensuring stable performance across corners. Implemented in GF 55nm technology, the LDO operates at 1V to 1.2V input voltage, delivering up to 50mA current with less than 200mV dropout. It consumes 43.85μA quiescent current, settles within 1μA, and exhibits excellent line regulation (3.76mV/V), load regulation (0.0076mA/mV), and PSRR (-44dB @ 1KHz). Bachelor's degree 2024-06-19T02:04:04Z 2024-06-19T02:04:04Z 2024 Final Year Project (FYP) Xie, X. (2024). The design of a CMOS only low-power low-voltage low-dropout voltage regulator (LDO) with an embedded voltage reference. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/178418 https://hdl.handle.net/10356/178418 en A2208-231 application/pdf Nanyang Technological University
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
language	English
topic	Engineering Low-dropout (LDO) voltage regulator Bandgap Voltage reference (VR) CMOS
spellingShingle	Engineering Low-dropout (LDO) voltage regulator Bandgap Voltage reference (VR) CMOS Xie, Xinzhe The design of a CMOS only low-power low-voltage low-dropout voltage regulator (LDO) with an embedded voltage reference
description	This report presented a transient-enhanced low dropout voltage (LDO) regulator with an integrated push-pull composite power transistor and an embedded voltage reference (VR). The use of a composite power transistor shifts parasitic poles to higher frequencies, enhancing stability. A recycling folded cascode (RFC) amplifier achieves higher loop gain, improving load and line regulation. A recovery time enhancement circuit reduces overshoot recovery. The VR employs various resistor types for high-order compensation, with trimming ensuring stable performance across corners. Implemented in GF 55nm technology, the LDO operates at 1V to 1.2V input voltage, delivering up to 50mA current with less than 200mV dropout. It consumes 43.85μA quiescent current, settles within 1μA, and exhibits excellent line regulation (3.76mV/V), load regulation (0.0076mA/mV), and PSRR (-44dB @ 1KHz).
author2	Siek Liter
author_facet	Siek Liter Xie, Xinzhe
format	Final Year Project
author	Xie, Xinzhe
author_sort	Xie, Xinzhe
title	The design of a CMOS only low-power low-voltage low-dropout voltage regulator (LDO) with an embedded voltage reference
title_short	The design of a CMOS only low-power low-voltage low-dropout voltage regulator (LDO) with an embedded voltage reference
title_full	The design of a CMOS only low-power low-voltage low-dropout voltage regulator (LDO) with an embedded voltage reference
title_fullStr	The design of a CMOS only low-power low-voltage low-dropout voltage regulator (LDO) with an embedded voltage reference
title_full_unstemmed	The design of a CMOS only low-power low-voltage low-dropout voltage regulator (LDO) with an embedded voltage reference
title_sort	design of a cmos only low-power low-voltage low-dropout voltage regulator (ldo) with an embedded voltage reference
publisher	Nanyang Technological University
publishDate	2024
url	https://hdl.handle.net/10356/178418
_version_	1814047228019343360

The design of a CMOS only low-power low-voltage low-dropout voltage regulator (LDO) with an embedded voltage reference

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