Machine learning hardware accelerator for single-event-latchup (SEL) and micro-SEL detection in commercial-off-the-shelf (COTS) systems
The space industry is undergoing the evolution of ‘New Space’, where commercial-off-the-shelf (COTS) integrated circuits (ICs) and System-on-Chip (SoC) are increasingly employed in space missions, particularly in small Low Earth Orbit (LEO) satellites. However, most COTS ICs and SoCs are intolerant...
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sg-ntu-dr.10356-1787932024-07-05T15:43:16Z Machine learning hardware accelerator for single-event-latchup (SEL) and micro-SEL detection in commercial-off-the-shelf (COTS) systems Liao, Chenqing Chang Joseph School of Electrical and Electronic Engineering EJSCHANG@ntu.edu.sg Engineering The space industry is undergoing the evolution of ‘New Space’, where commercial-off-the-shelf (COTS) integrated circuits (ICs) and System-on-Chip (SoC) are increasingly employed in space missions, particularly in small Low Earth Orbit (LEO) satellites. However, most COTS ICs and SoCs are intolerant to radiation, e.g., cosmic rays and solar rays in space. Among the various radiation effects, the single-event-latchup (SEL) is of the most concern – it is catastrophic to semiconductor devices when it occurs. In addition, the micro-SEL, a low-current SEL phenomenon, may also occur, where the induced current is lower than an SEL – therefore more difficult to detect, potentially compromising device reliability and lifespan. This dissertation involves a machine-learning-based (ML-based) and deep-learning-based (DL-based) method for micro-SEL detection, alongside the development of a hardware accelerator implemented on a Field-Programmable Gate Array (FPGA) to accelerate the detection process. Through laser-induced micro-SEL experimentation, several current profiles of micro-SELs are acquired and modeled using MATLAB, generating a comprehensive dataset for ML-based/DL-based models for micro-SEL detection. Subsequently, six algorithms (namely, Random Forest (RF), XGBoost, LightGBM, Support Vector Machines (SVMs), Deep Neural Networks (DNNs), and Long Short-Term Memory (LSTM) Neural Networks) are utilized. The LSTM achieved a superior accuracy of ~98%. Logarithmic and linear quantization strategies are thereafter proposed to process the weights in the LSTM layer and fully connected (FC) layer, respectively. Subsequently, the quantized model is reconstructed and validated. Finally, the hardware resource utilization of our developed FPGA-based prototype of the accelerator is evaluated. The accelerator demonstrated high accuracy and reasonable hardware resource utilization. Experimental results show that the accelerator can correctly detect the advent of SEL and micro-SEL and achieve 90% accuracy with small amount of hardware resource. Consequently, the hardware accelerator effectively protects the COTS system against SEL/micro-SEL, rendering it appropriate for small satellite (space application) deployments. Master's degree 2024-07-05T07:17:53Z 2024-07-05T07:17:53Z 2024 Thesis-Master by Coursework Liao, C. (2024). Machine learning hardware accelerator for single-event-latchup (SEL) and micro-SEL detection in commercial-off-the-shelf (COTS) systems. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/178793 https://hdl.handle.net/10356/178793 en application/pdf Nanyang Technological University |
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Engineering Liao, Chenqing Machine learning hardware accelerator for single-event-latchup (SEL) and micro-SEL detection in commercial-off-the-shelf (COTS) systems |
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The space industry is undergoing the evolution of ‘New Space’, where commercial-off-the-shelf (COTS) integrated circuits (ICs) and System-on-Chip (SoC) are increasingly employed in space missions, particularly in small Low Earth Orbit (LEO) satellites. However, most COTS ICs and SoCs are intolerant to radiation, e.g., cosmic rays and solar rays in space. Among the various radiation effects, the single-event-latchup (SEL) is of the most concern – it is catastrophic to semiconductor devices when it occurs. In addition, the micro-SEL, a low-current SEL phenomenon, may also occur, where the induced current is lower than an SEL – therefore more difficult to detect, potentially compromising device reliability and lifespan.
This dissertation involves a machine-learning-based (ML-based) and deep-learning-based (DL-based) method for micro-SEL detection, alongside the development of a hardware accelerator implemented on a Field-Programmable Gate Array (FPGA) to accelerate the detection process. Through laser-induced micro-SEL experimentation, several current profiles of micro-SELs are acquired and modeled using MATLAB, generating a comprehensive dataset for ML-based/DL-based models for micro-SEL detection. Subsequently, six algorithms (namely, Random Forest (RF), XGBoost, LightGBM, Support Vector Machines (SVMs), Deep Neural Networks (DNNs), and Long Short-Term Memory (LSTM) Neural Networks) are utilized.
The LSTM achieved a superior accuracy of ~98%. Logarithmic and linear quantization strategies are thereafter proposed to process the weights in the LSTM layer and fully connected (FC) layer, respectively. Subsequently, the quantized model is reconstructed and validated. Finally, the hardware resource utilization of our developed FPGA-based prototype of the accelerator is evaluated. The accelerator demonstrated high accuracy and reasonable hardware resource utilization. Experimental results show that the accelerator can correctly detect the advent of SEL and micro-SEL and achieve 90% accuracy with small amount of hardware resource. Consequently, the hardware accelerator effectively protects the COTS system against SEL/micro-SEL, rendering it appropriate for small satellite (space application) deployments. |
author2 |
Chang Joseph |
author_facet |
Chang Joseph Liao, Chenqing |
format |
Thesis-Master by Coursework |
author |
Liao, Chenqing |
author_sort |
Liao, Chenqing |
title |
Machine learning hardware accelerator for single-event-latchup (SEL) and micro-SEL detection in commercial-off-the-shelf (COTS) systems |
title_short |
Machine learning hardware accelerator for single-event-latchup (SEL) and micro-SEL detection in commercial-off-the-shelf (COTS) systems |
title_full |
Machine learning hardware accelerator for single-event-latchup (SEL) and micro-SEL detection in commercial-off-the-shelf (COTS) systems |
title_fullStr |
Machine learning hardware accelerator for single-event-latchup (SEL) and micro-SEL detection in commercial-off-the-shelf (COTS) systems |
title_full_unstemmed |
Machine learning hardware accelerator for single-event-latchup (SEL) and micro-SEL detection in commercial-off-the-shelf (COTS) systems |
title_sort |
machine learning hardware accelerator for single-event-latchup (sel) and micro-sel detection in commercial-off-the-shelf (cots) systems |
publisher |
Nanyang Technological University |
publishDate |
2024 |
url |
https://hdl.handle.net/10356/178793 |
_version_ |
1814047348142112768 |