Device implementation and arithmetic circuit design of ternary logic

Device implementation and arithmetic circuit design of ternary logic

Tremendous amounts of data are being generated and should be processed during the massive employment of artificial intelligence and edge/cloud computing, necessitating computers with higher capabilities. However, as Moore's Law approaches its limit, enhancing computing capability through transi...

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書目詳細資料
主要作者:	Zhao, Guangchao
其他作者:	Tay Beng Kang
格式:	Thesis-Doctor of Philosophy
語言:	English
出版:	Nanyang Technological University 2024
主題:	Engineering Ternary logic computing Multiple-valued logic Logic devices based on 2D semiconductors Ternary arithmetic circuits
在線閱讀:	https://hdl.handle.net/10356/181052
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!
機構:	Nanyang Technological University
語言:	English

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