The design and analysis of an input/output rail-to-rail Op-Amp with class-AB output drive in 55nm tech node
With the rapid advancement of technology, operational amplifiers (Op-Amps) have evolved into diverse categories, each designed for specific applications and models. The continuous progress in Very-Large-Scale Integration (VLSI) and complementary metal-oxide-semiconductor (CMOS) manufacturing has ope...
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sg-ntu-dr.10356-1818672024-12-27T15:46:06Z The design and analysis of an input/output rail-to-rail Op-Amp with class-AB output drive in 55nm tech node Lu, Sipeng Siek Liter School of Electrical and Electronic Engineering ELSIEK@ntu.edu.sg Engineering With the rapid advancement of technology, operational amplifiers (Op-Amps) have evolved into diverse categories, each designed for specific applications and models. The continuous progress in Very-Large-Scale Integration (VLSI) and complementary metal-oxide-semiconductor (CMOS) manufacturing has opened new avenues for optimizing operational amplifier designs. In modern electronics, the demand has shifted towards amplifiers that offer low power consumption, wide bandwidth, high stability, high precision, and reduced production costs. This paper presents the design of an operational amplifier that addresses these demands. The design of the integrated circuit (IC) can be divided into three fundamental sections. The first section involves the input stage, which utilizes a differential amplifier configuration with a fixed conversion control mechanism, ensuring high performance and accuracy. The second section is the gain stage, where a single-stage amplifier configuration is adopted, augmented with a floating power source to improve gain characteristics significantly. The final section is the output stage, comprising an AB-class push-pull amplifier designed for optimal performance in power output. The fabrication process for this design leverages the Global Foundry 55nm CMOS technology. Simulation and verification results indicate that the practical implementation achieves a gain exceeding 80dB, a phase margin of 47.72°, and a unity-gain frequency of 29.25MHz, all while maintaining a power consumption of 201.6uW. Furthermore, the amplifier demonstrates an output swing ranging from 0V to 1.2V, with the ability to reliably drive capacitive loads up to 50pF and resistive loads of 10k ohm. This design showcases a robust and efficient solution for modern operational amplifier applications, meeting the high-performance requirements of contemporary electronic systems. Master's degree 2024-12-27T12:06:58Z 2024-12-27T12:06:58Z 2024 Thesis-Master by Coursework Lu, S. (2024). The design and analysis of an input/output rail-to-rail Op-Amp with class-AB output drive in 55nm tech node. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/181867 https://hdl.handle.net/10356/181867 en application/pdf Nanyang Technological University |
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Engineering Lu, Sipeng The design and analysis of an input/output rail-to-rail Op-Amp with class-AB output drive in 55nm tech node |
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With the rapid advancement of technology, operational amplifiers (Op-Amps) have evolved into diverse categories, each designed for specific applications and models. The continuous progress in Very-Large-Scale Integration (VLSI) and complementary metal-oxide-semiconductor (CMOS) manufacturing has opened new avenues for optimizing operational amplifier designs. In modern electronics, the demand has shifted towards amplifiers that offer low power consumption, wide bandwidth, high stability, high precision, and reduced production costs. This paper presents the design of an operational amplifier that addresses these demands.
The design of the integrated circuit (IC) can be divided into three fundamental sections. The first section involves the input stage, which utilizes a differential amplifier configuration with a fixed conversion control mechanism, ensuring high performance and accuracy. The second section is the gain stage, where a single-stage amplifier configuration is adopted, augmented with a floating power source to improve gain characteristics significantly. The final section is the output stage, comprising an AB-class push-pull amplifier designed for optimal performance in power output.
The fabrication process for this design leverages the Global Foundry 55nm CMOS technology. Simulation and verification results indicate that the practical implementation achieves a gain exceeding 80dB, a phase margin of 47.72°, and a unity-gain frequency of 29.25MHz, all while maintaining a power consumption of 201.6uW. Furthermore, the amplifier demonstrates an output swing ranging from 0V to 1.2V, with the ability to reliably drive capacitive loads up to 50pF and resistive loads of 10k ohm.
This design showcases a robust and efficient solution for modern operational amplifier applications, meeting the high-performance requirements of contemporary electronic systems. |
author2 |
Siek Liter |
author_facet |
Siek Liter Lu, Sipeng |
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Thesis-Master by Coursework |
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Lu, Sipeng |
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Lu, Sipeng |
title |
The design and analysis of an input/output rail-to-rail Op-Amp with class-AB output drive in 55nm tech node |
title_short |
The design and analysis of an input/output rail-to-rail Op-Amp with class-AB output drive in 55nm tech node |
title_full |
The design and analysis of an input/output rail-to-rail Op-Amp with class-AB output drive in 55nm tech node |
title_fullStr |
The design and analysis of an input/output rail-to-rail Op-Amp with class-AB output drive in 55nm tech node |
title_full_unstemmed |
The design and analysis of an input/output rail-to-rail Op-Amp with class-AB output drive in 55nm tech node |
title_sort |
design and analysis of an input/output rail-to-rail op-amp with class-ab output drive in 55nm tech node |
publisher |
Nanyang Technological University |
publishDate |
2024 |
url |
https://hdl.handle.net/10356/181867 |
_version_ |
1820027770091077632 |