Low-power techniques for CMOS SRAM design

• Main Author: Wang, Hai Bo
• Other Authors: Liu, Po Ching
• Format: Theses and Dissertations
• Language: English
• Published: 2009
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• Online Access: http://hdl.handle.net/10356/19581
• Institution: Nanyang Technological University

This project attempts on exploring some low-power circuit techniques for CMOS SRAM design. The interests of this work are focused on the power reduction of the memory cell array, current-mode sensing circuit and FIFO memory.