VLSI implementation of an inference processor for approximate reasoning
This report outlines the design and implementation of a prototype fuzzy inference processor (FIP) using Xilinx field programmable gate arrays (FPGAs). The fuzzy rules are represented as pre-computed relation matrices and the fuzzy input variables are considered to be in the form of fuzzy singletons....
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sg-ntu-dr.10356-197412023-07-04T15:42:19Z VLSI implementation of an inference processor for approximate reasoning Ho, Jiun Sien. Lim, Meng Hiot School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems This report outlines the design and implementation of a prototype fuzzy inference processor (FIP) using Xilinx field programmable gate arrays (FPGAs). The fuzzy rules are represented as pre-computed relation matrices and the fuzzy input variables are considered to be in the form of fuzzy singletons. This simplifies the inferencing process significantly and results in hardware architecture that is less complex. Master of Engineering 2009-12-14T06:33:25Z 2009-12-14T06:33:25Z 1995 1995 Thesis http://hdl.handle.net/10356/19741 en NANYANG TECHNOLOGICAL UNIVERSITY 98 p. application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems Ho, Jiun Sien. VLSI implementation of an inference processor for approximate reasoning |
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This report outlines the design and implementation of a prototype fuzzy inference processor (FIP) using Xilinx field programmable gate arrays (FPGAs). The fuzzy rules are represented as pre-computed relation matrices and the fuzzy input variables are considered to be in the form of fuzzy singletons. This simplifies the inferencing process significantly and results in hardware architecture that is less complex. |
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Lim, Meng Hiot |
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Lim, Meng Hiot Ho, Jiun Sien. |
format |
Theses and Dissertations |
author |
Ho, Jiun Sien. |
author_sort |
Ho, Jiun Sien. |
title |
VLSI implementation of an inference processor for approximate reasoning |
title_short |
VLSI implementation of an inference processor for approximate reasoning |
title_full |
VLSI implementation of an inference processor for approximate reasoning |
title_fullStr |
VLSI implementation of an inference processor for approximate reasoning |
title_full_unstemmed |
VLSI implementation of an inference processor for approximate reasoning |
title_sort |
vlsi implementation of an inference processor for approximate reasoning |
publishDate |
2009 |
url |
http://hdl.handle.net/10356/19741 |
_version_ |
1772829007938584576 |