VLSI implementation of a parser for MPEG-2 systems program stream

This report presents the VLSI design and implementation of a Parser for Program Stream of MPEG2 System Layer. The MPEG2 Program Stream Syntax, the Parser architecture, HDL implementation, simulation, synthesis and design timing analysis are discussed in detail.

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Bibliographic Details
Main Author: Ashwin Pai Ballambettu.
Other Authors: Ho, Duan Juat
Format: Theses and Dissertations
Published: 2008
Subjects:
Online Access:http://hdl.handle.net/10356/4279
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Institution: Nanyang Technological University