Computer-aided fault analysis of digital circuit
Two test pattern generation programs are developed - bd and MoDalg. The bd implements the boolean difference method, an algebraic method that manipulates boolean equations to derive a complete test set for all possible stuck-at faults in the circuit under test.
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2009
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| Online Access: | http://hdl.handle.net/10356/19814 |
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sg-ntu-dr.10356-198142023-07-04T16:03:31Z Computer-aided fault analysis of digital circuit Yip, Chee Soon. Chin, Edward Hsi Ling School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Two test pattern generation programs are developed - bd and MoDalg. The bd implements the boolean difference method, an algebraic method that manipulates boolean equations to derive a complete test set for all possible stuck-at faults in the circuit under test. Master of Engineering 2009-12-14T06:41:46Z 2009-12-14T06:41:46Z 1992 1992 Thesis http://hdl.handle.net/10356/19814 en NANYANG TECHNOLOGICAL UNIVERSITY 180 p. application/pdf |
| institution |
Nanyang Technological University |
| building |
NTU Library |
| continent |
Asia |
| country |
Singapore Singapore |
| content_provider |
NTU Library |
| collection |
DR-NTU |
| language |
English |
| topic |
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits |
| spellingShingle |
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Yip, Chee Soon. Computer-aided fault analysis of digital circuit |
| description |
Two test pattern generation programs are developed - bd and MoDalg. The bd implements the boolean difference method, an algebraic method that manipulates boolean equations to derive a complete test set for all possible stuck-at faults in the circuit under test. |
| author2 |
Chin, Edward Hsi Ling |
| author_facet |
Chin, Edward Hsi Ling Yip, Chee Soon. |
| format |
Theses and Dissertations |
| author |
Yip, Chee Soon. |
| author_sort |
Yip, Chee Soon. |
| title |
Computer-aided fault analysis of digital circuit |
| title_short |
Computer-aided fault analysis of digital circuit |
| title_full |
Computer-aided fault analysis of digital circuit |
| title_fullStr |
Computer-aided fault analysis of digital circuit |
| title_full_unstemmed |
Computer-aided fault analysis of digital circuit |
| title_sort |
computer-aided fault analysis of digital circuit |
| publishDate |
2009 |
| url |
http://hdl.handle.net/10356/19814 |
| _version_ |
1772826222076624896 |