FPGA implementation of turbo decoders with various decoding algorithms

FPGA implementation of turbo decoders with various decoding algorithms

This thesis is aimed to implement turbo decoder with various iteratie decoding algorithms, and to compare their hardware requirements, speeds achievable and error performances.

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Bibliographic Details
Main Author: Lu, Shanguo.
Other Authors: Gunawan, Erry
Format: Theses and Dissertations
Published: 2008
Subjects:
DRNTU::Engineering::Computer science and engineering::Computing methodologies::Pattern recognition
Online Access:http://hdl.handle.net/10356/2385
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Institution: Nanyang Technological University
Description
Summary:This thesis is aimed to implement turbo decoder with various iteratie decoding algorithms, and to compare their hardware requirements, speeds achievable and error performances.

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