FPGA implementation of turbo decoders with various decoding algorithms

This thesis is aimed to implement turbo decoder with various iteratie decoding algorithms, and to compare their hardware requirements, speeds achievable and error performances.

Saved in:
Bibliographic Details
Main Author: Lu, Shanguo.
Other Authors: Gunawan, Erry
Format: Theses and Dissertations
Published: 2008
Subjects:
Online Access:http://hdl.handle.net/10356/2385
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
id sg-ntu-dr.10356-2385
record_format dspace
spelling sg-ntu-dr.10356-23852023-03-04T00:31:57Z FPGA implementation of turbo decoders with various decoding algorithms Lu, Shanguo. Gunawan, Erry School of Computer Engineering DRNTU::Engineering::Computer science and engineering::Computing methodologies::Pattern recognition This thesis is aimed to implement turbo decoder with various iteratie decoding algorithms, and to compare their hardware requirements, speeds achievable and error performances. Master of Philosophy 2008-09-17T09:01:48Z 2008-09-17T09:01:48Z 2001 2001 Thesis http://hdl.handle.net/10356/2385 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Computer science and engineering::Computing methodologies::Pattern recognition
spellingShingle DRNTU::Engineering::Computer science and engineering::Computing methodologies::Pattern recognition
Lu, Shanguo.
FPGA implementation of turbo decoders with various decoding algorithms
description This thesis is aimed to implement turbo decoder with various iteratie decoding algorithms, and to compare their hardware requirements, speeds achievable and error performances.
author2 Gunawan, Erry
author_facet Gunawan, Erry
Lu, Shanguo.
format Theses and Dissertations
author Lu, Shanguo.
author_sort Lu, Shanguo.
title FPGA implementation of turbo decoders with various decoding algorithms
title_short FPGA implementation of turbo decoders with various decoding algorithms
title_full FPGA implementation of turbo decoders with various decoding algorithms
title_fullStr FPGA implementation of turbo decoders with various decoding algorithms
title_full_unstemmed FPGA implementation of turbo decoders with various decoding algorithms
title_sort fpga implementation of turbo decoders with various decoding algorithms
publishDate 2008
url http://hdl.handle.net/10356/2385
_version_ 1759858283685871616