High performance multiply-accumulate unit for residue number system DSP core

High performance multiply-accumulate unit for residue number system DSP core

High speed computing continues to inspire the researchers, especially in the more demanding areas like digital signal processing and multimedia applications. In this regard multiplier designs and multiplier-accumulator units (MAC) have long been a topic of interest to the digital community due to th...

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Main Author: Pretthy, A. P.
Other Authors: Radhakrishnan, Damu
Format: Theses and Dissertations
Published: 2008
Subjects:
DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures
Online Access:http://hdl.handle.net/10356/2622
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Institution: Nanyang Technological University
id sg-ntu-dr.10356-2622
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spelling sg-ntu-dr.10356-26222023-03-04T00:32:03Z High performance multiply-accumulate unit for residue number system DSP core Pretthy, A. P. Radhakrishnan, Damu School of Computer Engineering DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures High speed computing continues to inspire the researchers, especially in the more demanding areas like digital signal processing and multimedia applications. In this regard multiplier designs and multiplier-accumulator units (MAC) have long been a topic of interest to the digital community due to their extensive use in almost every digital design. Many innovative techniques have been used in the past for the design of multipliers by making use of the number theoretical properties of finite fields. Even though a few of these designs were based on the structure of polynomial rings, the properties of finite integer rings have not been exploited to their full potential so far. Doctor of Philosophy (SCE) 2008-09-17T09:06:31Z 2008-09-17T09:06:31Z 2000 2000 Thesis http://hdl.handle.net/10356/2622 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures
spellingShingle DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures
Pretthy, A. P.
High performance multiply-accumulate unit for residue number system DSP core
description High speed computing continues to inspire the researchers, especially in the more demanding areas like digital signal processing and multimedia applications. In this regard multiplier designs and multiplier-accumulator units (MAC) have long been a topic of interest to the digital community due to their extensive use in almost every digital design. Many innovative techniques have been used in the past for the design of multipliers by making use of the number theoretical properties of finite fields. Even though a few of these designs were based on the structure of polynomial rings, the properties of finite integer rings have not been exploited to their full potential so far.
author2 Radhakrishnan, Damu
author_facet Radhakrishnan, Damu
Pretthy, A. P.
format Theses and Dissertations
author Pretthy, A. P.
author_sort Pretthy, A. P.
title High performance multiply-accumulate unit for residue number system DSP core
title_short High performance multiply-accumulate unit for residue number system DSP core
title_full High performance multiply-accumulate unit for residue number system DSP core
title_fullStr High performance multiply-accumulate unit for residue number system DSP core
title_full_unstemmed High performance multiply-accumulate unit for residue number system DSP core
title_sort high performance multiply-accumulate unit for residue number system dsp core
publishDate 2008
url http://hdl.handle.net/10356/2622
_version_ 1759856756310147072

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